106 lines
3.4 KiB
Diff
106 lines
3.4 KiB
Diff
From 2afaade4b554fa0d5aedfb121f37f039f1fe4a4a Mon Sep 17 00:00:00 2001
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From: Daniel Kolesa <daniel@octaforge.org>
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Date: Sat, 10 Dec 2022 17:24:17 +0100
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Subject: [PATCH 4/6] do not rely on system headers for cpu info
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---
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src/malloc/scudo/checksum.cpp | 32 +++++++++++++++++++++++---------
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src/malloc/scudo/checksum.h | 26 ++++++++++++++++----------
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2 files changed, 39 insertions(+), 19 deletions(-)
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diff --git a/src/malloc/scudo/checksum.cpp b/src/malloc/scudo/checksum.cpp
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index 2c277391..49270ecb 100644
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--- a/src/malloc/scudo/checksum.cpp
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+++ b/src/malloc/scudo/checksum.cpp
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@@ -10,9 +10,7 @@
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#include "atomic_helpers.h"
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#include "chunk.h"
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-#if defined(__x86_64__) || defined(__i386__)
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-#include <cpuid.h>
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-#elif defined(__arm__) || defined(__aarch64__)
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+#if defined(__arm__) || defined(__aarch64__)
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#if SCUDO_FUCHSIA
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#include <zircon/features.h>
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#include <zircon/syscalls.h>
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@@ -28,16 +26,32 @@ Checksum HashAlgorithm = {Checksum::BSD};
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#if defined(__x86_64__) || defined(__i386__)
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// i386 and x86_64 specific code to detect CRC32 hardware support via CPUID.
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// CRC32 requires the SSE 4.2 instruction set.
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-#ifndef bit_SSE4_2
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-#define bit_SSE4_2 bit_SSE42 // clang and gcc have different defines.
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-#endif
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-
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-#ifndef signature_HYGON_ebx // They are not defined in gcc.
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-// HYGON: "HygonGenuine".
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+#define bit_SSE4_2 (1 << 20)
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+// signatures from cpuid.h
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+#define signature_AMD_ebx 0x68747541
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+#define signature_AMD_edx 0x69746e65
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+#define signature_AMD_ecx 0x444d4163
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+#define signature_INTEL_ebx 0x756e6547
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+#define signature_INTEL_edx 0x49656e69
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+#define signature_INTEL_ecx 0x6c65746e
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#define signature_HYGON_ebx 0x6f677948
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#define signature_HYGON_edx 0x6e65476e
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#define signature_HYGON_ecx 0x656e6975
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+
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+inline void __get_cpuid(
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+ unsigned int leaf, unsigned int *eax, unsigned int *ebx,
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+ unsigned int *ecx, unsigned int *edx
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+) {
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+#if __i386__
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+ __asm("cpuid" : "=a"(*eax), "=b" (*ebx), "=c"(*ecx), "=d"(*edx) : "0"(leaf));
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+#else
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+ __asm(" xchgq %%rbx,%q1\n"
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+ " cpuid\n"
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+ " xchgq %%rbx,%q1"
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+ : "=a"(*eax), "=r" (*ebx), "=c"(*ecx), "=d"(*edx)
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+ : "0"(leaf));
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#endif
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+}
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bool hasHardwareCRC32() {
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u32 Eax, Ebx = 0, Ecx = 0, Edx = 0;
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diff --git a/src/malloc/scudo/checksum.h b/src/malloc/scudo/checksum.h
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index d61b6d88..8e738730 100644
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--- a/src/malloc/scudo/checksum.h
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+++ b/src/malloc/scudo/checksum.h
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@@ -17,18 +17,24 @@
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// An additional check must be performed at runtime as well to make sure the
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// emitted instructions are valid on the target host.
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-#if defined(__CRC32__)
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-// NB: clang has <crc32intrin.h> but GCC does not
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-#include <smmintrin.h>
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-#define CRC32_INTRINSIC \
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- FIRST_32_SECOND_64(__builtin_ia32_crc32si, __builtin_ia32_crc32di)
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-#elif defined(__SSE4_2__)
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-#include <smmintrin.h>
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-#define CRC32_INTRINSIC FIRST_32_SECOND_64(_mm_crc32_u32, _mm_crc32_u64)
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+#if defined(__CRC32__) || defined(__SSE4_2__)
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+#ifdef __x86_64__
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+#define CRC32_INTRINSIC __builtin_ia32_crc32di
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+#else
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+#define CRC32_INTRINSIC __builtin_ia32_crc32si
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#endif
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+#endif
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+
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#ifdef __ARM_FEATURE_CRC32
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-#include <arm_acle.h>
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-#define CRC32_INTRINSIC FIRST_32_SECOND_64(__crc32cw, __crc32cd)
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+#ifndef __aarch64__
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+#define CRC32_INTRINSIC __builtin_arm_crc32cw
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+#else
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+#ifdef __clang__
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+#define CRC32_INTRINSIC __builtin_arm_crc32cd
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+#else
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+#define CRC32_INTRINSIC __builtin_aarch64_crc32cx
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+#endif
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+#endif
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#endif
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namespace scudo {
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--
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2.43.0
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