mirror of
https://github.com/GreemDev/Ryujinx.git
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208 lines
5.4 KiB
C#
208 lines
5.4 KiB
C#
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using ChocolArm64.Decoders;
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using ChocolArm64.State;
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using ChocolArm64.Translation;
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using System.Reflection.Emit;
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namespace ChocolArm64.Instructions
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{
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static partial class InstEmit
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{
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public static void Bfm(ILEmitterCtx context)
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{
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OpCodeBfm64 op = (OpCodeBfm64)context.CurrOp;
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EmitBfmLoadRn(context);
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context.EmitLdintzr(op.Rd);
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context.EmitLdc_I(~op.WMask & op.TMask);
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context.Emit(OpCodes.And);
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context.Emit(OpCodes.Or);
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context.EmitLdintzr(op.Rd);
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context.EmitLdc_I(~op.TMask);
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context.Emit(OpCodes.And);
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context.Emit(OpCodes.Or);
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context.EmitStintzr(op.Rd);
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}
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public static void Sbfm(ILEmitterCtx context)
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{
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OpCodeBfm64 op = (OpCodeBfm64)context.CurrOp;
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int bitsCount = op.GetBitsCount();
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if (op.Pos + 1 == bitsCount)
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{
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EmitSbfmShift(context);
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}
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else if (op.Pos < op.Shift)
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{
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EmitSbfiz(context);
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}
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else if (op.Pos == 7 && op.Shift == 0)
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{
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EmitSbfmCast(context, OpCodes.Conv_I1);
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}
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else if (op.Pos == 15 && op.Shift == 0)
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{
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EmitSbfmCast(context, OpCodes.Conv_I2);
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}
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else if (op.Pos == 31 && op.Shift == 0)
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{
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EmitSbfmCast(context, OpCodes.Conv_I4);
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}
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else
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{
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EmitBfmLoadRn(context);
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context.EmitLdintzr(op.Rn);
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context.EmitLsl(bitsCount - 1 - op.Pos);
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context.EmitAsr(bitsCount - 1);
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context.EmitLdc_I(~op.TMask);
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context.Emit(OpCodes.And);
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context.Emit(OpCodes.Or);
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context.EmitStintzr(op.Rd);
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}
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}
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public static void Ubfm(ILEmitterCtx context)
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{
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OpCodeBfm64 op = (OpCodeBfm64)context.CurrOp;
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if (op.Pos + 1 == op.GetBitsCount())
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{
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EmitUbfmShift(context);
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}
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else if (op.Pos < op.Shift)
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{
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EmitUbfiz(context);
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}
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else if (op.Pos + 1 == op.Shift)
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{
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EmitBfmLsl(context);
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}
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else if (op.Pos == 7 && op.Shift == 0)
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{
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EmitUbfmCast(context, OpCodes.Conv_U1);
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}
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else if (op.Pos == 15 && op.Shift == 0)
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{
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EmitUbfmCast(context, OpCodes.Conv_U2);
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}
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else
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{
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EmitBfmLoadRn(context);
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context.EmitStintzr(op.Rd);
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}
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}
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private static void EmitSbfiz(ILEmitterCtx context) => EmitBfiz(context, true);
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private static void EmitUbfiz(ILEmitterCtx context) => EmitBfiz(context, false);
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private static void EmitBfiz(ILEmitterCtx context, bool signed)
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{
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OpCodeBfm64 op = (OpCodeBfm64)context.CurrOp;
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int width = op.Pos + 1;
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context.EmitLdintzr(op.Rn);
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context.EmitLsl(op.GetBitsCount() - width);
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if (signed)
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{
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context.EmitAsr(op.Shift - width);
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}
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else
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{
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context.EmitLsr(op.Shift - width);
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}
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context.EmitStintzr(op.Rd);
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}
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private static void EmitSbfmCast(ILEmitterCtx context, OpCode ilOp)
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{
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EmitBfmCast(context, ilOp, true);
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}
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private static void EmitUbfmCast(ILEmitterCtx context, OpCode ilOp)
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{
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EmitBfmCast(context, ilOp, false);
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}
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private static void EmitBfmCast(ILEmitterCtx context, OpCode ilOp, bool signed)
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{
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OpCodeBfm64 op = (OpCodeBfm64)context.CurrOp;
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context.EmitLdintzr(op.Rn);
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context.Emit(ilOp);
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if (op.RegisterSize != RegisterSize.Int32)
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{
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context.Emit(signed
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? OpCodes.Conv_I8
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: OpCodes.Conv_U8);
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}
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context.EmitStintzr(op.Rd);
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}
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private static void EmitSbfmShift(ILEmitterCtx context)
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{
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EmitBfmShift(context, true);
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}
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private static void EmitUbfmShift(ILEmitterCtx context)
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{
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EmitBfmShift(context, false);
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}
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private static void EmitBfmShift(ILEmitterCtx context, bool signed)
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{
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OpCodeBfm64 op = (OpCodeBfm64)context.CurrOp;
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context.EmitLdintzr(op.Rn);
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context.EmitLdc_I4(op.Shift);
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context.Emit(signed
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? OpCodes.Shr
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: OpCodes.Shr_Un);
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context.EmitStintzr(op.Rd);
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}
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private static void EmitBfmLsl(ILEmitterCtx context)
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{
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OpCodeBfm64 op = (OpCodeBfm64)context.CurrOp;
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context.EmitLdintzr(op.Rn);
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context.EmitLsl(op.GetBitsCount() - op.Shift);
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context.EmitStintzr(op.Rd);
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}
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private static void EmitBfmLoadRn(ILEmitterCtx context)
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{
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OpCodeBfm64 op = (OpCodeBfm64)context.CurrOp;
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context.EmitLdintzr(op.Rn);
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context.EmitRor(op.Shift);
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context.EmitLdc_I(op.WMask & op.TMask);
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context.Emit(OpCodes.And);
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}
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}
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}
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