7 commits

Author	SHA1	Message	Date
LDj3SNuD	e9a96e3522	Add 151 complete tests for 71 base instructions of types: Alu; AluImm; AluRs; AluRx; Bfm; CcmpImm; CcmpReg; Csel; Mov; Mul. (#80) ... * Add files via upload * Update Ryujinx.Tests.csproj	2018-04-18 17:22:45 -03:00
MS-DOS1999	c9ef25681d	Add Frintx_S, ASRV test, update ADCS, use Assert.Multiple and indent (#44) ... * add 'ADC 32bit and Overflow' test * Add WZR/WSP tests * fix ADC and ADDS * add ADCS test * add SBCS test * indent my code and delete comment * '/' <- i hate you x) * remove spacebar char * remove false tab * add frintx_S test * update frintx_S test * add ASRV test * fix new line * fix PR * fix indent	2018-03-05 09:21:19 -03:00
MS-DOS1999	a4ff0d3484	Update ADC test, add WZR/WSP, ADCS, SBCS test (#37) ... * add 'ADC 32bit and Overflow' test * Add WZR/WSP tests * fix ADC and ADDS * add ADCS test * add SBCS test * indent my code and delete comment * '/' <- i hate you x) * remove spacebar char * remove false tab	2018-02-24 22:50:58 -03:00
MS-DOS1999	eafc58c9f2	Add flags parameters in singleOpcode function, and add ADC Test (#36) ... * Add flags parameters in singleOpcode function, and add ADC Test * Update CpuTestAlu.cs * Update CpuTestAlu.cs * Update CpuTestAlu.cs * Update CpuTestAlu.cs	2018-02-23 11:53:32 -03:00
LDj3SNuD	f09a0082bf	Review of cpu tests and creation of a class for mixed cpu tests. (#35) ... * Update CpuTest.cs * Update CpuTestAlu.cs * Update CpuTestScalar.cs * Update CpuTestSimdMove.cs * Create CpuTestMisc.cs * Update CpuTest.cs * Update CpuTestScalar.cs * Update CpuTest.cs * Update CpuTestAlu.cs * Update CpuTestMisc.cs * Update CpuTestScalar.cs	2018-02-23 09:29:20 -03:00
gdkchan	f35d286c8d	Rename ARegisters to AThreadState	2018-02-18 16:28:07 -03:00
Merry	1bfe6a9c22	Add some tests (#18) ... * Add tests * Add some simple Alu instruction tests * travis: Run tests * CpuTest: Add TearDown	2018-02-15 21:04:38 -03:00