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7 commits

Author SHA1 Message Date
CJ Bok
0a7c6caedf
System Time Offset Implementation (#1101)
* System Time Offset Implementation

* Addressed @Thog's comments

* Addressed JD's comments

* Addressed @Thog's and @AcK77's comments

* formatting correction
2020-04-17 09:18:54 +10:00
Thomas Guillemard
1aba033ba7 Update time implementation to 9.0.0 (#783)
* Fix 9.0.0 related services bindings

This was wrong because of a mistake on switchbrew.

* Fix wronog cmdid for ISteadyClock::GetTestOffset/SetTestOffset

* Update ClockCore logics to 9.0.0

Also apply 9.0.0 permissions and comment time:u, and time:a (as those
are going to be moved)

* Move every clocks instances + timezone to a global manager

* Start implementing time:m

Also prepare the skeleton of the shared memory

* Implement SystemClockContextUpdateCallback and co

* Update StaticService to 9.0.0

* Update ISystemClock to 9.0.0

* Rename IStaticService and add glue's IStaticService

* Implement psc's ITimeZoneService

* Integrate psc layer into glue for TimeZoneService

* Rename TimeZoneManagerForPsc => TimeZoneManager

* Use correct TimeZoneService interface for both StaticService implementations

* Accurately implement time shared memory operations

* Fix two critical flaws in TimeZone logic

The first one was the month range being different fron Nintendo one
(0-11 instead of 1-12)

The other flaw was a bad incrementation order during days & months
computation.

* Follow Nintendo's abort logic for TimeManager

* Avoid crashing when timezone sysarchive isn't present

* Update Readme

* Address comments

* Correctly align fields in ISystemClock

* Fix code style and some typos

* Improve timezone system archive warning/error messages

* Rearrange using definitions in Horizon.cs

* Address comments
2019-10-08 14:48:49 +11:00
Ac_K
a0720b5681 Refactoring HOS folder structure (#771)
* Refactoring HOS folder structure

Refactoring HOS folder structure:

- Added some subfolders when needed (Following structure decided in private).
- Added some `Types` folders when needed.
- Little cleanup here and there.
- Add services placeholders for every HOS services (close #766 and #753).

* Remove Types namespaces
2019-09-19 10:45:11 +10:00
gdkchan
a731ab3a2a Add a new JIT compiler for CPU code (#693)
* Start of the ARMeilleure project

* Refactoring around the old IRAdapter, now renamed to PreAllocator

* Optimize the LowestBitSet method

* Add CLZ support and fix CLS implementation

* Add missing Equals and GetHashCode overrides on some structs, misc small tweaks

* Implement the ByteSwap IR instruction, and some refactoring on the assembler

* Implement the DivideUI IR instruction and fix 64-bits IDIV

* Correct constant operand type on CSINC

* Move division instructions implementation to InstEmitDiv

* Fix destination type for the ConditionalSelect IR instruction

* Implement UMULH and SMULH, with new IR instructions

* Fix some issues with shift instructions

* Fix constant types for BFM instructions

* Fix up new tests using the new V128 struct

* Update tests

* Move DIV tests to a separate file

* Add support for calls, and some instructions that depends on them

* Start adding support for SIMD & FP types, along with some of the related ARM instructions

* Fix some typos and the divide instruction with FP operands

* Fix wrong method call on Clz_V

* Implement ARM FP & SIMD move instructions, Saddlv_V, and misc. fixes

* Implement SIMD logical instructions and more misc. fixes

* Fix PSRAD x86 instruction encoding, TRN, UABD and UABDL implementations

* Implement float conversion instruction, merge in LDj3SNuD fixes, and some other misc. fixes

* Implement SIMD shift instruction and fix Dup_V

* Add SCVTF and UCVTF (vector, fixed-point) variants to the opcode table

* Fix check with tolerance on tester

* Implement FP & SIMD comparison instructions, and some fixes

* Update FCVT (Scalar) encoding on the table to support the Half-float variants

* Support passing V128 structs, some cleanup on the register allocator, merge LDj3SNuD fixes

* Use old memory access methods, made a start on SIMD memory insts support, some fixes

* Fix float constant passed to functions, save and restore non-volatile XMM registers, other fixes

* Fix arguments count with struct return values, other fixes

* More instructions

* Misc. fixes and integrate LDj3SNuD fixes

* Update tests

* Add a faster linear scan allocator, unwinding support on windows, and other changes

* Update Ryujinx.HLE

* Update Ryujinx.Graphics

* Fix V128 return pointer passing, RCX is clobbered

* Update Ryujinx.Tests

* Update ITimeZoneService

* Stop using GetFunctionPointer as that can't be called from native code, misc. fixes and tweaks

* Use generic GetFunctionPointerForDelegate method and other tweaks

* Some refactoring on the code generator, assert on invalid operations and use a separate enum for intrinsics

* Remove some unused code on the assembler

* Fix REX.W prefix regression on float conversion instructions, add some sort of profiler

* Add hardware capability detection

* Fix regression on Sha1h and revert Fcm** changes

* Add SSE2-only paths on vector extract and insert, some refactoring on the pre-allocator

* Fix silly mistake introduced on last commit on CpuId

* Generate inline stack probes when the stack allocation is too large

* Initial support for the System-V ABI

* Support multiple destination operands

* Fix SSE2 VectorInsert8 path, and other fixes

* Change placement of XMM callee save and restore code to match other compilers

* Rename Dest to Destination and Inst to Instruction

* Fix a regression related to calls and the V128 type

* Add an extra space on comments to match code style

* Some refactoring

* Fix vector insert FP32 SSE2 path

* Port over the ARM32 instructions

* Avoid memory protection races on JIT Cache

* Another fix on VectorInsert FP32 (thanks to LDj3SNuD

* Float operands don't need to use the same register when VEX is supported

* Add a new register allocator, higher quality code for hot code (tier up), and other tweaks

* Some nits, small improvements on the pre allocator

* CpuThreadState is gone

* Allow changing CPU emulators with a config entry

* Add runtime identifiers on the ARMeilleure project

* Allow switching between CPUs through a config entry (pt. 2)

* Change win10-x64 to win-x64 on projects

* Update the Ryujinx project to use ARMeilleure

* Ensure that the selected register is valid on the hybrid allocator

* Allow exiting on returns to 0 (should fix test regression)

* Remove register assignments for most used variables on the hybrid allocator

* Do not use fixed registers as spill temp

* Add missing namespace and remove unneeded using

* Address PR feedback

* Fix types, etc

* Enable AssumeStrictAbiCompliance by default

* Ensure that Spill and Fill don't load or store any more than necessary
2019-08-08 21:56:22 +03:00
Thomas Guillemard
54b79dffa8 Implement time:* 4.0.0 commands (#736)
* Abstract SteadyClockCore to follow Nintendo changes in 4.x

This is the ground work for 4.0.0 support

* Implement TickBasedSteadyClockCore

Preparation for the ephemeral clock.

* Refactor SystemClockCore to follow 4.0.0 changes

* Implement EphemeralNetworkSystemClock

* Implement GetSnapshotClock & GetSnapshotClockFromSystemClockContext

* Implement CalculateStandardUserSystemClockDifferenceByUser & CalculateSpanBetween

* Remove an outdated comment & unused import

* Fix a nit and GetClockSnapshot

* Address comment
2019-07-25 11:44:51 -03:00
Thomas Guillemard
1f3a34dd7a Implement time:* 2.0.0 & 3.0.0 commands (#735)
* Finish ISteadyClock implementation

* Implement IsStandardNetworkSystemClockAccuracySufficient

Also use signed values for offsets and TimeSpanType

* Address comments

* Fix one missing nit and improve one comment
2019-07-15 19:52:35 +02:00
Thomas Guillemard
97d0c62423 Accurately implement steady & system clocks (#732)
* Improve SteadyClock implementation accuracy

* Rewrite system clocks to be accurate

* Implement IStaticService 100 & 101

* Add time:* permissions

* Address comments

* Realign TimePermissions definitions

* Address gdk's comments

* Fix after rebase
2019-07-14 22:50:11 +02:00