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* Delete DelegateTypes.cs * Delete DelegateCache.cs * Add files via upload * Update Horizon.cs * Update Program.cs * Update MainWindow.cs * Update Aot.cs * Update RelocEntry.cs * Update Translator.cs * Update MemoryManager.cs * Update InstEmitMemoryHelper.cs * Update Delegates.cs * Nit. * Nit. * Nit. * 10 fewer MSIL bytes for us * Add comment. Nits. * Update Translator.cs * Update Aot.cs * Nits. * Opt.. * Opt.. * Opt.. * Opt.. * Allow to change compression level. * Update MemoryManager.cs * Update Translator.cs * Manage corner cases during the save phase. Nits. * Update Aot.cs * Translator response tweak for Aot disabled. Nit. * Nit. * Nits. * Create DelegateHelpers.cs * Update Delegates.cs * Nit. * Nit. * Nits. * Fix due to #784. * Fixes due to #757 & #841. * Fix due to #846. * Fix due to #847. * Use MethodInfo for managed method calls. Use IR methods instead of managed methods about Max/Min (S/U). Follow-ups & Nits. * Add missing exception messages. Reintroduce slow path for Fmov_Vi. Implement slow path for Fmov_Si. * Switch to the new folder structure. Nits. * Impl. index-based relocation information. Impl. cache file version field. * Nit. * Address gdkchan comments. Mainly: - fixed cache file corruption issue on exit; - exposed a way to disable AOT on the GUI. * Address AcK77 comment. * Address Thealexbarney, jduncanator & emmauss comments. Header magic, CpuId (FI) & Aot -> Ptc. * Adaptation to the new application reloading system. Improvements to the call system of managed methods. Follow-ups. Nits. * Get the same boot times as on master when PTC is disabled. * Profiled Aot. * A32 support (#897). * #975 support (1 of 2). * #975 support (2 of 2). * Rebase fix & nits. * Some fixes and nits (still one bug left). * One fix & nits. * Tests fix (by gdk) & nits. * Support translations not only in high quality and rejit. Nits. * Added possibility to skip translations and continue execution, using `ESC` key. * Update SettingsWindow.cs * Update GLRenderer.cs * Update Ptc.cs * Disabled Profiled PTC by default as requested in the past by gdk. * Fix rejit bug. Increased number of parallel translations. Add stack unwinding stuffs support (1 of 2). Nits. * Add stack unwinding stuffs support (2 of 2). Tuned number of parallel translations. * Restored the ability to assemble jumps with 8-bit offset when Profiled PTC is disabled or during profiling. Modifications due to rebase. Nits. * Limited profiling of the functions to be translated to the addresses belonging to the range of static objects only. * Nits. * Nits. * Update Delegates.cs * Nit. * Update InstEmitSimdArithmetic.cs * Address riperiperi comments. * Fixed the issue of unjustifiably longer boot times at the second boot than at the first boot, measured at the same time or reference point and with the same number of translated functions. * Implemented a simple redundant load/save mechanism. Halved the value of Decoder.MaxInstsPerFunction more appropriate for the current performance of the Translator. Replaced by Logger.PrintError to Logger.PrintDebug in TexturePool.cs about the supposed invalid texture format to avoid the spawn of the log. Nits. * Nit. Improved Logger.PrintError in TexturePool.cs to avoid log spawn. Added missing code for FZ handling (in output) for fp max/min instructions (slow paths). * Add configuration migration for PTC Co-authored-by: Thog <me@thog.eu>
184 lines
No EOL
6.8 KiB
C#
184 lines
No EOL
6.8 KiB
C#
using ARMeilleure.Decoders;
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using ARMeilleure.IntermediateRepresentation;
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using ARMeilleure.Translation;
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using System;
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using System.Diagnostics;
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using static ARMeilleure.Instructions.InstEmitHelper;
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using static ARMeilleure.Instructions.InstEmitMemoryExHelper;
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using static ARMeilleure.IntermediateRepresentation.OperandHelper;
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namespace ARMeilleure.Instructions
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{
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static partial class InstEmit
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{
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[Flags]
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private enum AccessType
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{
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None = 0,
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Ordered = 1,
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Exclusive = 2,
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OrderedEx = Ordered | Exclusive
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}
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public static void Clrex(ArmEmitterContext context)
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{
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context.Call(typeof(NativeInterface).GetMethod(nameof(NativeInterface.ClearExclusive)));
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}
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public static void Dmb(ArmEmitterContext context) => EmitBarrier(context);
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public static void Dsb(ArmEmitterContext context) => EmitBarrier(context);
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public static void Ldar(ArmEmitterContext context) => EmitLdr(context, AccessType.Ordered);
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public static void Ldaxr(ArmEmitterContext context) => EmitLdr(context, AccessType.OrderedEx);
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public static void Ldxr(ArmEmitterContext context) => EmitLdr(context, AccessType.Exclusive);
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public static void Ldxp(ArmEmitterContext context) => EmitLdp(context, AccessType.Exclusive);
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public static void Ldaxp(ArmEmitterContext context) => EmitLdp(context, AccessType.OrderedEx);
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private static void EmitLdr(ArmEmitterContext context, AccessType accType)
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{
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EmitLoadEx(context, accType, pair: false);
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}
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private static void EmitLdp(ArmEmitterContext context, AccessType accType)
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{
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EmitLoadEx(context, accType, pair: true);
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}
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private static void EmitLoadEx(ArmEmitterContext context, AccessType accType, bool pair)
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{
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OpCodeMemEx op = (OpCodeMemEx)context.CurrOp;
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bool ordered = (accType & AccessType.Ordered) != 0;
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bool exclusive = (accType & AccessType.Exclusive) != 0;
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if (ordered)
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{
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EmitBarrier(context);
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}
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Operand address = context.Copy(GetIntOrSP(context, op.Rn));
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if (pair)
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{
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// Exclusive loads should be atomic. For pairwise loads, we need to
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// read all the data at once. For a 32-bits pairwise load, we do a
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// simple 64-bits load, for a 128-bits load, we need to call a special
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// method to read 128-bits atomically.
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if (op.Size == 2)
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{
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Operand value = EmitLoadExclusive(context, address, exclusive, 3);
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Operand valueLow = context.ConvertI64ToI32(value);
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valueLow = context.ZeroExtend32(OperandType.I64, valueLow);
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Operand valueHigh = context.ShiftRightUI(value, Const(32));
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SetIntOrZR(context, op.Rt, valueLow);
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SetIntOrZR(context, op.Rt2, valueHigh);
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}
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else if (op.Size == 3)
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{
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Operand value = EmitLoadExclusive(context, address, exclusive, 4);
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Operand valueLow = context.VectorExtract(OperandType.I64, value, 0);
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Operand valueHigh = context.VectorExtract(OperandType.I64, value, 1);
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SetIntOrZR(context, op.Rt, valueLow);
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SetIntOrZR(context, op.Rt2, valueHigh);
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}
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else
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{
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throw new InvalidOperationException($"Invalid load size of {1 << op.Size} bytes.");
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}
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}
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else
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{
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// 8, 16, 32 or 64-bits (non-pairwise) load.
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Operand value = EmitLoadExclusive(context, address, exclusive, op.Size);
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SetIntOrZR(context, op.Rt, value);
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}
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}
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public static void Pfrm(ArmEmitterContext context)
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{
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// Memory Prefetch, execute as no-op.
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}
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public static void Stlr(ArmEmitterContext context) => EmitStr(context, AccessType.Ordered);
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public static void Stlxr(ArmEmitterContext context) => EmitStr(context, AccessType.OrderedEx);
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public static void Stxr(ArmEmitterContext context) => EmitStr(context, AccessType.Exclusive);
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public static void Stxp(ArmEmitterContext context) => EmitStp(context, AccessType.Exclusive);
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public static void Stlxp(ArmEmitterContext context) => EmitStp(context, AccessType.OrderedEx);
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private static void EmitStr(ArmEmitterContext context, AccessType accType)
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{
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EmitStoreEx(context, accType, pair: false);
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}
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private static void EmitStp(ArmEmitterContext context, AccessType accType)
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{
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EmitStoreEx(context, accType, pair: true);
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}
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private static void EmitStoreEx(ArmEmitterContext context, AccessType accType, bool pair)
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{
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OpCodeMemEx op = (OpCodeMemEx)context.CurrOp;
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bool ordered = (accType & AccessType.Ordered) != 0;
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bool exclusive = (accType & AccessType.Exclusive) != 0;
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if (ordered)
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{
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EmitBarrier(context);
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}
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Operand address = context.Copy(GetIntOrSP(context, op.Rn));
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Operand t = GetIntOrZR(context, op.Rt);
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Operand s = null;
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if (pair)
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{
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Debug.Assert(op.Size == 2 || op.Size == 3, "Invalid size for pairwise store.");
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Operand t2 = GetIntOrZR(context, op.Rt2);
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Operand value;
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if (op.Size == 2)
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{
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value = context.BitwiseOr(t, context.ShiftLeft(t2, Const(32)));
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}
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else /* if (op.Size == 3) */
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{
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value = context.VectorInsert(context.VectorZero(), t, 0);
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value = context.VectorInsert(value, t2, 1);
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}
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s = EmitStoreExclusive(context, address, value, exclusive, op.Size + 1);
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}
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else
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{
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s = EmitStoreExclusive(context, address, t, exclusive, op.Size);
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}
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if (s != null)
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{
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// This is only needed for exclusive stores. The function returns 0
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// when the store is successful, and 1 otherwise.
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SetIntOrZR(context, op.Rs, s);
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}
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}
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private static void EmitBarrier(ArmEmitterContext context)
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{
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// Note: This barrier is most likely not necessary, and probably
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// doesn't make any difference since we need to do a ton of stuff
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// (software MMU emulation) to read or write anything anyway.
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}
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}
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} |