mirror of
https://github.com/GreemDev/Ryujinx.git
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9cb57fb4bb
* Change naming convention for Ryujinx project * Change naming convention for ChocolArm64 project * Fix NaN * Remove unneeded this. from Ryujinx project * Adjust naming from new PRs * Name changes based on feedback * How did this get removed? * Rebasing fix * Change FP enum case * Remove prefix from ChocolArm64 classes - Part 1 * Remove prefix from ChocolArm64 classes - Part 2 * Fix alignment from last commit's renaming * Rename namespaces * Rename stragglers * Fix alignment * Rename OpCode class * Missed a few * Adjust alignment
140 lines
3.9 KiB
C#
140 lines
3.9 KiB
C#
using ChocolArm64.Decoders;
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using ChocolArm64.Translation;
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using static ChocolArm64.Instructions.InstEmitSimdHelper;
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namespace ChocolArm64.Instructions
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{
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static partial class InstEmit
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{
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#region "Sha1"
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public static void Sha1c_V(ILEmitterCtx context)
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{
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OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
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context.EmitLdvec(op.Rd);
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EmitVectorExtractZx(context, op.Rn, 0, 2);
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context.EmitLdvec(op.Rm);
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SoftFallback.EmitCall(context, nameof(SoftFallback.HashChoose));
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context.EmitStvec(op.Rd);
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}
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public static void Sha1h_V(ILEmitterCtx context)
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{
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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EmitVectorExtractZx(context, op.Rn, 0, 2);
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SoftFallback.EmitCall(context, nameof(SoftFallback.FixedRotate));
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EmitScalarSet(context, op.Rd, 2);
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}
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public static void Sha1m_V(ILEmitterCtx context)
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{
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OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
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context.EmitLdvec(op.Rd);
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EmitVectorExtractZx(context, op.Rn, 0, 2);
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context.EmitLdvec(op.Rm);
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SoftFallback.EmitCall(context, nameof(SoftFallback.HashMajority));
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context.EmitStvec(op.Rd);
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}
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public static void Sha1p_V(ILEmitterCtx context)
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{
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OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
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context.EmitLdvec(op.Rd);
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EmitVectorExtractZx(context, op.Rn, 0, 2);
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context.EmitLdvec(op.Rm);
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SoftFallback.EmitCall(context, nameof(SoftFallback.HashParity));
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context.EmitStvec(op.Rd);
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}
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public static void Sha1su0_V(ILEmitterCtx context)
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{
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OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
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context.EmitLdvec(op.Rd);
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context.EmitLdvec(op.Rn);
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context.EmitLdvec(op.Rm);
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SoftFallback.EmitCall(context, nameof(SoftFallback.Sha1SchedulePart1));
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context.EmitStvec(op.Rd);
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}
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public static void Sha1su1_V(ILEmitterCtx context)
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{
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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context.EmitLdvec(op.Rd);
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context.EmitLdvec(op.Rn);
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SoftFallback.EmitCall(context, nameof(SoftFallback.Sha1SchedulePart2));
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context.EmitStvec(op.Rd);
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}
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#endregion
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#region "Sha256"
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public static void Sha256h_V(ILEmitterCtx context)
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{
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OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
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context.EmitLdvec(op.Rd);
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context.EmitLdvec(op.Rn);
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context.EmitLdvec(op.Rm);
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SoftFallback.EmitCall(context, nameof(SoftFallback.HashLower));
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context.EmitStvec(op.Rd);
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}
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public static void Sha256h2_V(ILEmitterCtx context)
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{
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OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
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context.EmitLdvec(op.Rd);
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context.EmitLdvec(op.Rn);
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context.EmitLdvec(op.Rm);
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SoftFallback.EmitCall(context, nameof(SoftFallback.HashUpper));
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context.EmitStvec(op.Rd);
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}
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public static void Sha256su0_V(ILEmitterCtx context)
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{
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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context.EmitLdvec(op.Rd);
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context.EmitLdvec(op.Rn);
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SoftFallback.EmitCall(context, nameof(SoftFallback.Sha256SchedulePart1));
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context.EmitStvec(op.Rd);
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}
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public static void Sha256su1_V(ILEmitterCtx context)
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{
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OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
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context.EmitLdvec(op.Rd);
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context.EmitLdvec(op.Rn);
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context.EmitLdvec(op.Rm);
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SoftFallback.EmitCall(context, nameof(SoftFallback.Sha256SchedulePart2));
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context.EmitStvec(op.Rd);
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}
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#endregion
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}
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}
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