mirror of
https://github.com/GreemDev/Ryujinx.git
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e21ebbf666
* Add optimizations related to caller/callee saved registers, thread synchronization and disable tier 0 * Refactoring * Add a config entry to enable or disable the reg load/store opt. * Remove unnecessary register state stores for calls when the callee is know * Rename IoType to VarType * Enable tier 0 while fixing some perf issues related to tier 0 * Small tweak -- Compile before adding to the cache, to avoid lags * Add required config entry
46 lines
No EOL
1.4 KiB
C#
46 lines
No EOL
1.4 KiB
C#
using ChocolArm64.State;
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using System.Reflection.Emit;
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namespace ChocolArm64.Translation
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{
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struct ILOpCodeStore : IILEmit
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{
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public int Index { get; }
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public VarType VarType { get; }
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public RegisterSize RegisterSize { get; }
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public ILOpCodeStore(int index, VarType varType, RegisterSize registerSize = 0)
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{
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Index = index;
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VarType = varType;
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RegisterSize = registerSize;
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}
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public void Emit(ILMethodBuilder context)
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{
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switch (VarType)
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{
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case VarType.Arg: context.Generator.EmitStarg(Index); break;
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case VarType.Flag: EmitStloc(context, Index, RegisterType.Flag); break;
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case VarType.Int: EmitStloc(context, Index, RegisterType.Int); break;
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case VarType.Vector: EmitStloc(context, Index, RegisterType.Vector); break;
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}
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}
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private void EmitStloc(ILMethodBuilder context, int index, RegisterType registerType)
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{
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Register reg = new Register(index, registerType);
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if (registerType == RegisterType.Int &&
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RegisterSize == RegisterSize.Int32)
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{
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context.Generator.Emit(OpCodes.Conv_U8);
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}
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context.Generator.EmitStloc(context.GetLocalIndex(reg));
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}
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}
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} |