mirror of
https://github.com/GreemDev/Ryujinx.git
synced 2024-12-23 13:55:47 +00:00
86fd0643c2
* Implement support for page sizes > 4KB * Check and work around more alignment issues * Was not meant to change this * Use MemoryBlock.GetPageSize() value for signal handler code * Do not take the path for private allocations if host supports 4KB pages * Add Flags attribute on MemoryMapFlags * Fix dirty region size with 16kb pages Would accidentally report a size that was too high (generally 16k instead of 4k, uploading 4x as much data) Co-authored-by: riperiperi <rhy3756547@hotmail.com>
704 lines
22 KiB
C#
704 lines
22 KiB
C#
using ARMeilleure.Memory;
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using Ryujinx.Cpu.Tracking;
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using Ryujinx.Memory;
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using Ryujinx.Memory.Range;
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using Ryujinx.Memory.Tracking;
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using System;
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using System.Collections.Generic;
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using System.Linq;
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using System.Runtime.CompilerServices;
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using System.Runtime.InteropServices;
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using System.Threading;
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namespace Ryujinx.Cpu.Jit
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{
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/// <summary>
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/// Represents a CPU memory manager.
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/// </summary>
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public sealed class MemoryManager : MemoryManagerBase, IMemoryManager, IVirtualMemoryManagerTracked, IWritableBlock
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{
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public const int PageBits = 12;
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public const int PageSize = 1 << PageBits;
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public const int PageMask = PageSize - 1;
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private const int PteSize = 8;
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private const int PointerTagBit = 62;
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private readonly MemoryBlock _backingMemory;
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private readonly InvalidAccessHandler _invalidAccessHandler;
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/// <inheritdoc/>
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public bool Supports4KBPages => true;
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/// <summary>
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/// Address space width in bits.
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/// </summary>
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public int AddressSpaceBits { get; }
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private readonly ulong _addressSpaceSize;
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private readonly MemoryBlock _pageTable;
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/// <summary>
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/// Page table base pointer.
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/// </summary>
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public IntPtr PageTablePointer => _pageTable.Pointer;
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public MemoryManagerType Type => MemoryManagerType.SoftwarePageTable;
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public MemoryTracking Tracking { get; }
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public event Action<ulong, ulong> UnmapEvent;
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/// <summary>
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/// Creates a new instance of the memory manager.
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/// </summary>
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/// <param name="backingMemory">Physical backing memory where virtual memory will be mapped to</param>
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/// <param name="addressSpaceSize">Size of the address space</param>
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/// <param name="invalidAccessHandler">Optional function to handle invalid memory accesses</param>
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public MemoryManager(MemoryBlock backingMemory, ulong addressSpaceSize, InvalidAccessHandler invalidAccessHandler = null)
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{
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_backingMemory = backingMemory;
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_invalidAccessHandler = invalidAccessHandler;
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ulong asSize = PageSize;
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int asBits = PageBits;
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while (asSize < addressSpaceSize)
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{
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asSize <<= 1;
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asBits++;
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}
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AddressSpaceBits = asBits;
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_addressSpaceSize = asSize;
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_pageTable = new MemoryBlock((asSize / PageSize) * PteSize);
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Tracking = new MemoryTracking(this, PageSize);
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}
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/// <inheritdoc/>
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public void Map(ulong va, ulong pa, ulong size, MemoryMapFlags flags)
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{
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AssertValidAddressAndSize(va, size);
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ulong remainingSize = size;
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ulong oVa = va;
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ulong oPa = pa;
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while (remainingSize != 0)
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{
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_pageTable.Write((va / PageSize) * PteSize, PaToPte(pa));
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va += PageSize;
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pa += PageSize;
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remainingSize -= PageSize;
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}
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Tracking.Map(oVa, size);
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}
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/// <inheritdoc/>
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public void MapForeign(ulong va, nuint hostPointer, ulong size)
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{
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throw new NotSupportedException();
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}
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/// <inheritdoc/>
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public void Unmap(ulong va, ulong size)
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{
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// If size is 0, there's nothing to unmap, just exit early.
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if (size == 0)
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{
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return;
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}
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AssertValidAddressAndSize(va, size);
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UnmapEvent?.Invoke(va, size);
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Tracking.Unmap(va, size);
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ulong remainingSize = size;
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while (remainingSize != 0)
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{
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_pageTable.Write((va / PageSize) * PteSize, 0UL);
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va += PageSize;
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remainingSize -= PageSize;
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}
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}
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/// <inheritdoc/>
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public T Read<T>(ulong va) where T : unmanaged
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{
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return MemoryMarshal.Cast<byte, T>(GetSpan(va, Unsafe.SizeOf<T>()))[0];
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}
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/// <inheritdoc/>
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public T ReadTracked<T>(ulong va) where T : unmanaged
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{
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try
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{
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SignalMemoryTracking(va, (ulong)Unsafe.SizeOf<T>(), false);
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return Read<T>(va);
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}
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catch (InvalidMemoryRegionException)
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{
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if (_invalidAccessHandler == null || !_invalidAccessHandler(va))
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{
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throw;
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}
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return default;
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}
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}
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/// <inheritdoc/>
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public void Read(ulong va, Span<byte> data)
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{
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ReadImpl(va, data);
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}
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/// <inheritdoc/>
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public void Write<T>(ulong va, T value) where T : unmanaged
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{
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Write(va, MemoryMarshal.Cast<T, byte>(MemoryMarshal.CreateSpan(ref value, 1)));
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}
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/// <inheritdoc/>
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public void Write(ulong va, ReadOnlySpan<byte> data)
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{
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if (data.Length == 0)
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{
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return;
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}
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SignalMemoryTracking(va, (ulong)data.Length, true);
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WriteImpl(va, data);
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}
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/// <inheritdoc/>
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public void WriteUntracked(ulong va, ReadOnlySpan<byte> data)
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{
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if (data.Length == 0)
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{
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return;
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}
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WriteImpl(va, data);
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}
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/// <inheritdoc/>
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public bool WriteWithRedundancyCheck(ulong va, ReadOnlySpan<byte> data)
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{
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if (data.Length == 0)
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{
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return false;
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}
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SignalMemoryTracking(va, (ulong)data.Length, false);
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if (IsContiguousAndMapped(va, data.Length))
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{
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var target = _backingMemory.GetSpan(GetPhysicalAddressInternal(va), data.Length);
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bool changed = !data.SequenceEqual(target);
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if (changed)
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{
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data.CopyTo(target);
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}
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return changed;
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}
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else
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{
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WriteImpl(va, data);
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return true;
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}
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}
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/// <summary>
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/// Writes data to CPU mapped memory.
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/// </summary>
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/// <param name="va">Virtual address to write the data into</param>
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/// <param name="data">Data to be written</param>
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private void WriteImpl(ulong va, ReadOnlySpan<byte> data)
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{
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try
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{
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AssertValidAddressAndSize(va, (ulong)data.Length);
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if (IsContiguousAndMapped(va, data.Length))
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{
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data.CopyTo(_backingMemory.GetSpan(GetPhysicalAddressInternal(va), data.Length));
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}
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else
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{
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int offset = 0, size;
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if ((va & PageMask) != 0)
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{
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ulong pa = GetPhysicalAddressInternal(va);
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size = Math.Min(data.Length, PageSize - (int)(va & PageMask));
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data.Slice(0, size).CopyTo(_backingMemory.GetSpan(pa, size));
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offset += size;
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}
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for (; offset < data.Length; offset += size)
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{
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ulong pa = GetPhysicalAddressInternal(va + (ulong)offset);
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size = Math.Min(data.Length - offset, PageSize);
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data.Slice(offset, size).CopyTo(_backingMemory.GetSpan(pa, size));
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}
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}
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}
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catch (InvalidMemoryRegionException)
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{
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if (_invalidAccessHandler == null || !_invalidAccessHandler(va))
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{
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throw;
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}
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}
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}
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/// <inheritdoc/>
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public ReadOnlySpan<byte> GetSpan(ulong va, int size, bool tracked = false)
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{
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if (size == 0)
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{
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return ReadOnlySpan<byte>.Empty;
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}
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if (tracked)
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{
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SignalMemoryTracking(va, (ulong)size, false);
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}
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if (IsContiguousAndMapped(va, size))
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{
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return _backingMemory.GetSpan(GetPhysicalAddressInternal(va), size);
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}
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else
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{
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Span<byte> data = new byte[size];
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ReadImpl(va, data);
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return data;
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}
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}
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/// <inheritdoc/>
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public unsafe WritableRegion GetWritableRegion(ulong va, int size, bool tracked = false)
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{
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if (size == 0)
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{
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return new WritableRegion(null, va, Memory<byte>.Empty);
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}
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if (IsContiguousAndMapped(va, size))
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{
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if (tracked)
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{
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SignalMemoryTracking(va, (ulong)size, true);
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}
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return new WritableRegion(null, va, _backingMemory.GetMemory(GetPhysicalAddressInternal(va), size));
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}
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else
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{
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Memory<byte> memory = new byte[size];
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GetSpan(va, size).CopyTo(memory.Span);
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return new WritableRegion(this, va, memory, tracked);
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}
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}
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/// <inheritdoc/>
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public ref T GetRef<T>(ulong va) where T : unmanaged
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{
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if (!IsContiguous(va, Unsafe.SizeOf<T>()))
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{
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ThrowMemoryNotContiguous();
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}
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SignalMemoryTracking(va, (ulong)Unsafe.SizeOf<T>(), true);
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return ref _backingMemory.GetRef<T>(GetPhysicalAddressInternal(va));
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}
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/// <summary>
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/// Computes the number of pages in a virtual address range.
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/// </summary>
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/// <param name="va">Virtual address of the range</param>
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/// <param name="size">Size of the range</param>
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/// <param name="startVa">The virtual address of the beginning of the first page</param>
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/// <remarks>This function does not differentiate between allocated and unallocated pages.</remarks>
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private int GetPagesCount(ulong va, uint size, out ulong startVa)
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{
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// WARNING: Always check if ulong does not overflow during the operations.
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startVa = va & ~(ulong)PageMask;
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ulong vaSpan = (va - startVa + size + PageMask) & ~(ulong)PageMask;
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return (int)(vaSpan / PageSize);
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}
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private static void ThrowMemoryNotContiguous() => throw new MemoryNotContiguousException();
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private bool IsContiguousAndMapped(ulong va, int size) => IsContiguous(va, size) && IsMapped(va);
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private bool IsContiguous(ulong va, int size)
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{
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if (!ValidateAddress(va) || !ValidateAddressAndSize(va, (ulong)size))
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{
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return false;
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}
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int pages = GetPagesCount(va, (uint)size, out va);
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for (int page = 0; page < pages - 1; page++)
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{
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if (!ValidateAddress(va + PageSize))
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{
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return false;
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}
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if (GetPhysicalAddressInternal(va) + PageSize != GetPhysicalAddressInternal(va + PageSize))
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{
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return false;
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}
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va += PageSize;
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}
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return true;
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}
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/// <inheritdoc/>
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public IEnumerable<HostMemoryRange> GetHostRegions(ulong va, ulong size)
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{
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if (size == 0)
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{
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return Enumerable.Empty<HostMemoryRange>();
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}
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var guestRegions = GetPhysicalRegionsImpl(va, size);
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if (guestRegions == null)
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{
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return null;
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}
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var regions = new HostMemoryRange[guestRegions.Count];
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for (int i = 0; i < regions.Length; i++)
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{
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var guestRegion = guestRegions[i];
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IntPtr pointer = _backingMemory.GetPointer(guestRegion.Address, guestRegion.Size);
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regions[i] = new HostMemoryRange((nuint)(ulong)pointer, guestRegion.Size);
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}
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return regions;
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}
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/// <inheritdoc/>
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public IEnumerable<MemoryRange> GetPhysicalRegions(ulong va, ulong size)
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{
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if (size == 0)
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{
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return Enumerable.Empty<MemoryRange>();
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}
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return GetPhysicalRegionsImpl(va, size);
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}
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private List<MemoryRange> GetPhysicalRegionsImpl(ulong va, ulong size)
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{
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if (!ValidateAddress(va) || !ValidateAddressAndSize(va, size))
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{
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return null;
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}
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int pages = GetPagesCount(va, (uint)size, out va);
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var regions = new List<MemoryRange>();
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ulong regionStart = GetPhysicalAddressInternal(va);
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ulong regionSize = PageSize;
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for (int page = 0; page < pages - 1; page++)
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{
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if (!ValidateAddress(va + PageSize))
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{
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return null;
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}
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ulong newPa = GetPhysicalAddressInternal(va + PageSize);
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if (GetPhysicalAddressInternal(va) + PageSize != newPa)
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{
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regions.Add(new MemoryRange(regionStart, regionSize));
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regionStart = newPa;
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regionSize = 0;
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}
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va += PageSize;
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regionSize += PageSize;
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}
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regions.Add(new MemoryRange(regionStart, regionSize));
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return regions;
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}
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private void ReadImpl(ulong va, Span<byte> data)
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{
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if (data.Length == 0)
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{
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return;
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}
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try
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{
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AssertValidAddressAndSize(va, (ulong)data.Length);
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int offset = 0, size;
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if ((va & PageMask) != 0)
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{
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ulong pa = GetPhysicalAddressInternal(va);
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size = Math.Min(data.Length, PageSize - (int)(va & PageMask));
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_backingMemory.GetSpan(pa, size).CopyTo(data.Slice(0, size));
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offset += size;
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}
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for (; offset < data.Length; offset += size)
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{
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ulong pa = GetPhysicalAddressInternal(va + (ulong)offset);
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size = Math.Min(data.Length - offset, PageSize);
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_backingMemory.GetSpan(pa, size).CopyTo(data.Slice(offset, size));
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}
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}
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catch (InvalidMemoryRegionException)
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{
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if (_invalidAccessHandler == null || !_invalidAccessHandler(va))
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{
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throw;
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}
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}
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}
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/// <inheritdoc/>
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public bool IsRangeMapped(ulong va, ulong size)
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{
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if (size == 0UL)
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{
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return true;
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}
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if (!ValidateAddressAndSize(va, size))
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{
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return false;
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}
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int pages = GetPagesCount(va, (uint)size, out va);
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for (int page = 0; page < pages; page++)
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{
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if (!IsMapped(va))
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{
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return false;
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}
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va += PageSize;
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}
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return true;
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}
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/// <inheritdoc/>
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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public bool IsMapped(ulong va)
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{
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if (!ValidateAddress(va))
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{
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return false;
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}
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return _pageTable.Read<ulong>((va / PageSize) * PteSize) != 0;
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}
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private bool ValidateAddress(ulong va)
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{
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return va < _addressSpaceSize;
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}
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/// <summary>
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/// Checks if the combination of virtual address and size is part of the addressable space.
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/// </summary>
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/// <param name="va">Virtual address of the range</param>
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/// <param name="size">Size of the range in bytes</param>
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/// <returns>True if the combination of virtual address and size is part of the addressable space</returns>
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private bool ValidateAddressAndSize(ulong va, ulong size)
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{
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ulong endVa = va + size;
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return endVa >= va && endVa >= size && endVa <= _addressSpaceSize;
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}
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/// <summary>
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/// Ensures the combination of virtual address and size is part of the addressable space.
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/// </summary>
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/// <param name="va">Virtual address of the range</param>
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/// <param name="size">Size of the range in bytes</param>
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/// <exception cref="InvalidMemoryRegionException">Throw when the memory region specified outside the addressable space</exception>
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private void AssertValidAddressAndSize(ulong va, ulong size)
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{
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if (!ValidateAddressAndSize(va, size))
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{
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throw new InvalidMemoryRegionException($"va=0x{va:X16}, size=0x{size:X16}");
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}
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}
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private ulong GetPhysicalAddress(ulong va)
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{
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// We return -1L if the virtual address is invalid or unmapped.
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if (!ValidateAddress(va) || !IsMapped(va))
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{
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return ulong.MaxValue;
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}
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return GetPhysicalAddressInternal(va);
|
|
}
|
|
|
|
private ulong GetPhysicalAddressInternal(ulong va)
|
|
{
|
|
return PteToPa(_pageTable.Read<ulong>((va / PageSize) * PteSize) & ~(0xffffUL << 48)) + (va & PageMask);
|
|
}
|
|
|
|
/// <inheritdoc/>
|
|
public void TrackingReprotect(ulong va, ulong size, MemoryPermission protection)
|
|
{
|
|
AssertValidAddressAndSize(va, size);
|
|
|
|
// Protection is inverted on software pages, since the default value is 0.
|
|
protection = (~protection) & MemoryPermission.ReadAndWrite;
|
|
|
|
long tag = protection switch
|
|
{
|
|
MemoryPermission.None => 0L,
|
|
MemoryPermission.Write => 2L << PointerTagBit,
|
|
_ => 3L << PointerTagBit
|
|
};
|
|
|
|
int pages = GetPagesCount(va, (uint)size, out va);
|
|
ulong pageStart = va >> PageBits;
|
|
long invTagMask = ~(0xffffL << 48);
|
|
|
|
for (int page = 0; page < pages; page++)
|
|
{
|
|
ref long pageRef = ref _pageTable.GetRef<long>(pageStart * PteSize);
|
|
|
|
long pte;
|
|
|
|
do
|
|
{
|
|
pte = Volatile.Read(ref pageRef);
|
|
}
|
|
while (pte != 0 && Interlocked.CompareExchange(ref pageRef, (pte & invTagMask) | tag, pte) != pte);
|
|
|
|
pageStart++;
|
|
}
|
|
}
|
|
|
|
/// <inheritdoc/>
|
|
public CpuRegionHandle BeginTracking(ulong address, ulong size)
|
|
{
|
|
return new CpuRegionHandle(Tracking.BeginTracking(address, size));
|
|
}
|
|
|
|
/// <inheritdoc/>
|
|
public CpuMultiRegionHandle BeginGranularTracking(ulong address, ulong size, IEnumerable<IRegionHandle> handles, ulong granularity)
|
|
{
|
|
return new CpuMultiRegionHandle(Tracking.BeginGranularTracking(address, size, handles, granularity));
|
|
}
|
|
|
|
/// <inheritdoc/>
|
|
public CpuSmartMultiRegionHandle BeginSmartGranularTracking(ulong address, ulong size, ulong granularity)
|
|
{
|
|
return new CpuSmartMultiRegionHandle(Tracking.BeginSmartGranularTracking(address, size, granularity));
|
|
}
|
|
|
|
/// <inheritdoc/>
|
|
public void SignalMemoryTracking(ulong va, ulong size, bool write, bool precise = false)
|
|
{
|
|
AssertValidAddressAndSize(va, size);
|
|
|
|
if (precise)
|
|
{
|
|
Tracking.VirtualMemoryEvent(va, size, write, precise: true);
|
|
return;
|
|
}
|
|
|
|
// We emulate guard pages for software memory access. This makes for an easy transition to
|
|
// tracking using host guard pages in future, but also supporting platforms where this is not possible.
|
|
|
|
// Write tag includes read protection, since we don't have any read actions that aren't performed before write too.
|
|
long tag = (write ? 3L : 1L) << PointerTagBit;
|
|
|
|
int pages = GetPagesCount(va, (uint)size, out _);
|
|
ulong pageStart = va >> PageBits;
|
|
|
|
for (int page = 0; page < pages; page++)
|
|
{
|
|
ref long pageRef = ref _pageTable.GetRef<long>(pageStart * PteSize);
|
|
|
|
long pte;
|
|
|
|
pte = Volatile.Read(ref pageRef);
|
|
|
|
if ((pte & tag) != 0)
|
|
{
|
|
Tracking.VirtualMemoryEvent(va, size, write);
|
|
break;
|
|
}
|
|
|
|
pageStart++;
|
|
}
|
|
}
|
|
|
|
private ulong PaToPte(ulong pa)
|
|
{
|
|
return (ulong)_backingMemory.GetPointer(pa, PageSize);
|
|
}
|
|
|
|
private ulong PteToPa(ulong pte)
|
|
{
|
|
return (ulong)((long)pte - _backingMemory.Pointer.ToInt64());
|
|
}
|
|
|
|
/// <summary>
|
|
/// Disposes of resources used by the memory manager.
|
|
/// </summary>
|
|
protected override void Destroy() => _pageTable.Dispose();
|
|
|
|
private void ThrowInvalidMemoryRegionException(string message) => throw new InvalidMemoryRegionException(message);
|
|
}
|
|
}
|