mirror of
https://github.com/GreemDev/Ryujinx.git
synced 2024-12-23 16:15:47 +00:00
5e0f8e8738
* Implement JIT Arm64 backend * PPTC version bump * Address some feedback from Arm64 JIT PR * Address even more PR feedback * Remove unused IsPageAligned function * Sync Qc flag before calls * Fix comment and remove unused enum * Address riperiperi PR feedback * Delete Breakpoint IR instruction that was only implemented for Arm64
68 lines
No EOL
1.9 KiB
C#
68 lines
No EOL
1.9 KiB
C#
using ARMeilleure.CodeGen;
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using ARMeilleure.CodeGen.Optimizations;
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using ARMeilleure.Diagnostics;
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using ARMeilleure.IntermediateRepresentation;
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using System;
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using System.Runtime.InteropServices;
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namespace ARMeilleure.Translation
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{
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static class Compiler
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{
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public static CompiledFunction Compile(
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ControlFlowGraph cfg,
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OperandType[] argTypes,
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OperandType retType,
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CompilerOptions options,
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Architecture target)
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{
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CompilerContext cctx = new(cfg, argTypes, retType, options);
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if (options.HasFlag(CompilerOptions.Optimize))
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{
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Logger.StartPass(PassName.TailMerge);
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TailMerge.RunPass(cctx);
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Logger.EndPass(PassName.TailMerge, cfg);
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}
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if (options.HasFlag(CompilerOptions.SsaForm))
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{
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Logger.StartPass(PassName.Dominance);
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Dominance.FindDominators(cfg);
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Dominance.FindDominanceFrontiers(cfg);
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Logger.EndPass(PassName.Dominance);
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Logger.StartPass(PassName.SsaConstruction);
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Ssa.Construct(cfg);
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Logger.EndPass(PassName.SsaConstruction, cfg);
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}
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else
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{
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Logger.StartPass(PassName.RegisterToLocal);
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RegisterToLocal.Rename(cfg);
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Logger.EndPass(PassName.RegisterToLocal, cfg);
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}
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if (target == Architecture.X64)
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{
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return CodeGen.X86.CodeGenerator.Generate(cctx);
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}
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else if (target == Architecture.Arm64)
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{
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return CodeGen.Arm64.CodeGenerator.Generate(cctx);
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}
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else
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{
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throw new NotImplementedException(target.ToString());
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}
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}
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}
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} |