947 lines
30 KiB
C#
947 lines
30 KiB
C#
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using ARMeilleure.Memory;
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using Ryujinx.Cpu.Tracking;
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using Ryujinx.Memory;
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using Ryujinx.Memory.Range;
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using Ryujinx.Memory.Tracking;
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using System;
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using System.Collections.Generic;
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using System.Linq;
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using System.Runtime.CompilerServices;
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using System.Runtime.InteropServices;
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using System.Threading;
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namespace Ryujinx.Cpu.AppleHv
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{
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/// <summary>
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/// Represents a CPU memory manager which maps guest virtual memory directly onto the Hypervisor page table.
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/// </summary>
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public class HvMemoryManager : MemoryManagerBase, IMemoryManager, IVirtualMemoryManagerTracked, IWritableBlock
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{
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public const int PageBits = 12;
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public const int PageSize = 1 << PageBits;
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public const int PageMask = PageSize - 1;
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public const int PageToPteShift = 5; // 32 pages (2 bits each) in one ulong page table entry.
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public const ulong BlockMappedMask = 0x5555555555555555; // First bit of each table entry set.
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private enum HostMappedPtBits : ulong
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{
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Unmapped = 0,
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Mapped,
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WriteTracked,
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ReadWriteTracked,
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MappedReplicated = 0x5555555555555555,
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WriteTrackedReplicated = 0xaaaaaaaaaaaaaaaa,
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ReadWriteTrackedReplicated = ulong.MaxValue
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}
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private readonly InvalidAccessHandler _invalidAccessHandler;
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private readonly ulong _addressSpaceSize;
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private readonly HvAddressSpace _addressSpace;
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internal HvAddressSpace AddressSpace => _addressSpace;
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private readonly MemoryBlock _backingMemory;
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private readonly PageTable<ulong> _pageTable;
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private readonly ulong[] _pageBitmap;
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public bool Supports4KBPages => true;
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public int AddressSpaceBits { get; }
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public IntPtr PageTablePointer => IntPtr.Zero;
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public MemoryManagerType Type => MemoryManagerType.SoftwarePageTable;
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public MemoryTracking Tracking { get; }
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public event Action<ulong, ulong> UnmapEvent;
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/// <summary>
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/// Creates a new instance of the Hypervisor memory manager.
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/// </summary>
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/// <param name="backingMemory">Physical backing memory where virtual memory will be mapped to</param>
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/// <param name="addressSpaceSize">Size of the address space</param>
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/// <param name="invalidAccessHandler">Optional function to handle invalid memory accesses</param>
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public HvMemoryManager(MemoryBlock backingMemory, ulong addressSpaceSize, InvalidAccessHandler invalidAccessHandler = null)
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{
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_backingMemory = backingMemory;
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_pageTable = new PageTable<ulong>();
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_invalidAccessHandler = invalidAccessHandler;
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_addressSpaceSize = addressSpaceSize;
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ulong asSize = PageSize;
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int asBits = PageBits;
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while (asSize < addressSpaceSize)
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{
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asSize <<= 1;
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asBits++;
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}
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_addressSpace = new HvAddressSpace(backingMemory, asSize);
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AddressSpaceBits = asBits;
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_pageBitmap = new ulong[1 << (AddressSpaceBits - (PageBits + PageToPteShift))];
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Tracking = new MemoryTracking(this, PageSize, invalidAccessHandler);
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}
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/// <summary>
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/// Checks if the virtual address is part of the addressable space.
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/// </summary>
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/// <param name="va">Virtual address</param>
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/// <returns>True if the virtual address is part of the addressable space</returns>
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private bool ValidateAddress(ulong va)
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{
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return va < _addressSpaceSize;
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}
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/// <summary>
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/// Checks if the combination of virtual address and size is part of the addressable space.
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/// </summary>
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/// <param name="va">Virtual address of the range</param>
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/// <param name="size">Size of the range in bytes</param>
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/// <returns>True if the combination of virtual address and size is part of the addressable space</returns>
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private bool ValidateAddressAndSize(ulong va, ulong size)
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{
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ulong endVa = va + size;
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return endVa >= va && endVa >= size && endVa <= _addressSpaceSize;
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}
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/// <summary>
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/// Ensures the combination of virtual address and size is part of the addressable space.
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/// </summary>
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/// <param name="va">Virtual address of the range</param>
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/// <param name="size">Size of the range in bytes</param>
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/// <exception cref="InvalidMemoryRegionException">Throw when the memory region specified outside the addressable space</exception>
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private void AssertValidAddressAndSize(ulong va, ulong size)
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{
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if (!ValidateAddressAndSize(va, size))
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{
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throw new InvalidMemoryRegionException($"va=0x{va:X16}, size=0x{size:X16}");
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}
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}
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/// <summary>
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/// Ensures the combination of virtual address and size is part of the addressable space and fully mapped.
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/// </summary>
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/// <param name="va">Virtual address of the range</param>
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/// <param name="size">Size of the range in bytes</param>
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private void AssertMapped(ulong va, ulong size)
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{
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if (!ValidateAddressAndSize(va, size) || !IsRangeMappedImpl(va, size))
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{
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throw new InvalidMemoryRegionException($"Not mapped: va=0x{va:X16}, size=0x{size:X16}");
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}
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}
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/// <inheritdoc/>
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public void Map(ulong va, ulong pa, ulong size, MemoryMapFlags flags)
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{
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AssertValidAddressAndSize(va, size);
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PtMap(va, pa, size);
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_addressSpace.MapUser(va, pa, size, MemoryPermission.ReadWriteExecute);
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AddMapping(va, size);
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Tracking.Map(va, size);
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}
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private void PtMap(ulong va, ulong pa, ulong size)
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{
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while (size != 0)
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{
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_pageTable.Map(va, pa);
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va += PageSize;
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pa += PageSize;
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size -= PageSize;
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}
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}
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/// <inheritdoc/>
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public void MapForeign(ulong va, nuint hostPointer, ulong size)
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{
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throw new NotSupportedException();
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}
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/// <inheritdoc/>
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public void Unmap(ulong va, ulong size)
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{
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AssertValidAddressAndSize(va, size);
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UnmapEvent?.Invoke(va, size);
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Tracking.Unmap(va, size);
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RemoveMapping(va, size);
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_addressSpace.UnmapUser(va, size);
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PtUnmap(va, size);
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}
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private void PtUnmap(ulong va, ulong size)
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{
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while (size != 0)
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{
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_pageTable.Unmap(va);
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va += PageSize;
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size -= PageSize;
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}
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}
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/// <inheritdoc/>
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public T Read<T>(ulong va) where T : unmanaged
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{
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return MemoryMarshal.Cast<byte, T>(GetSpan(va, Unsafe.SizeOf<T>()))[0];
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}
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/// <inheritdoc/>
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public T ReadTracked<T>(ulong va) where T : unmanaged
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{
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try
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{
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SignalMemoryTracking(va, (ulong)Unsafe.SizeOf<T>(), false);
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return Read<T>(va);
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}
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catch (InvalidMemoryRegionException)
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{
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if (_invalidAccessHandler == null || !_invalidAccessHandler(va))
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{
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throw;
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}
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return default;
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}
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}
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/// <inheritdoc/>
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public void Read(ulong va, Span<byte> data)
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{
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ReadImpl(va, data);
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}
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/// <inheritdoc/>
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public void Write<T>(ulong va, T value) where T : unmanaged
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{
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Write(va, MemoryMarshal.Cast<T, byte>(MemoryMarshal.CreateSpan(ref value, 1)));
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}
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/// <inheritdoc/>
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public void Write(ulong va, ReadOnlySpan<byte> data)
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{
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if (data.Length == 0)
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{
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return;
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}
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SignalMemoryTracking(va, (ulong)data.Length, true);
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WriteImpl(va, data);
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}
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/// <inheritdoc/>
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public void WriteUntracked(ulong va, ReadOnlySpan<byte> data)
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{
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if (data.Length == 0)
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{
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return;
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}
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WriteImpl(va, data);
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}
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/// <inheritdoc/>
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public bool WriteWithRedundancyCheck(ulong va, ReadOnlySpan<byte> data)
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{
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if (data.Length == 0)
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{
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return false;
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}
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SignalMemoryTracking(va, (ulong)data.Length, false);
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if (IsContiguousAndMapped(va, data.Length))
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{
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var target = _backingMemory.GetSpan(GetPhysicalAddressInternal(va), data.Length);
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bool changed = !data.SequenceEqual(target);
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if (changed)
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{
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data.CopyTo(target);
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}
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return changed;
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}
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else
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{
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WriteImpl(va, data);
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return true;
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}
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}
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private void WriteImpl(ulong va, ReadOnlySpan<byte> data)
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{
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try
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{
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AssertValidAddressAndSize(va, (ulong)data.Length);
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if (IsContiguousAndMapped(va, data.Length))
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{
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data.CopyTo(_backingMemory.GetSpan(GetPhysicalAddressInternal(va), data.Length));
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}
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else
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{
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int offset = 0, size;
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if ((va & PageMask) != 0)
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{
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ulong pa = GetPhysicalAddressChecked(va);
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size = Math.Min(data.Length, PageSize - (int)(va & PageMask));
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data.Slice(0, size).CopyTo(_backingMemory.GetSpan(pa, size));
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offset += size;
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}
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for (; offset < data.Length; offset += size)
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{
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ulong pa = GetPhysicalAddressChecked(va + (ulong)offset);
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size = Math.Min(data.Length - offset, PageSize);
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data.Slice(offset, size).CopyTo(_backingMemory.GetSpan(pa, size));
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}
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}
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}
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catch (InvalidMemoryRegionException)
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{
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if (_invalidAccessHandler == null || !_invalidAccessHandler(va))
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{
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throw;
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}
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}
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}
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/// <inheritdoc/>
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public ReadOnlySpan<byte> GetSpan(ulong va, int size, bool tracked = false)
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{
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if (size == 0)
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{
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return ReadOnlySpan<byte>.Empty;
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}
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if (tracked)
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{
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SignalMemoryTracking(va, (ulong)size, false);
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}
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if (IsContiguousAndMapped(va, size))
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{
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return _backingMemory.GetSpan(GetPhysicalAddressInternal(va), size);
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}
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else
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{
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Span<byte> data = new byte[size];
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ReadImpl(va, data);
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return data;
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}
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}
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/// <inheritdoc/>
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public WritableRegion GetWritableRegion(ulong va, int size, bool tracked = false)
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{
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if (size == 0)
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{
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return new WritableRegion(null, va, Memory<byte>.Empty);
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}
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if (tracked)
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{
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SignalMemoryTracking(va, (ulong)size, true);
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}
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if (IsContiguousAndMapped(va, size))
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{
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return new WritableRegion(null, va, _backingMemory.GetMemory(GetPhysicalAddressInternal(va), size));
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}
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else
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{
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Memory<byte> memory = new byte[size];
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ReadImpl(va, memory.Span);
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return new WritableRegion(this, va, memory);
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}
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}
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/// <inheritdoc/>
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||
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public ref T GetRef<T>(ulong va) where T : unmanaged
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||
|
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{
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if (!IsContiguous(va, Unsafe.SizeOf<T>()))
|
||
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{
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ThrowMemoryNotContiguous();
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}
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SignalMemoryTracking(va, (ulong)Unsafe.SizeOf<T>(), true);
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return ref _backingMemory.GetRef<T>(GetPhysicalAddressChecked(va));
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}
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||
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||
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/// <inheritdoc/>
|
||
|
|
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
||
|
|
public bool IsMapped(ulong va)
|
||
|
|
{
|
||
|
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return ValidateAddress(va) && IsMappedImpl(va);
|
||
|
|
}
|
||
|
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|
||
|
|
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
||
|
|
private bool IsMappedImpl(ulong va)
|
||
|
|
{
|
||
|
|
ulong page = va >> PageBits;
|
||
|
|
|
||
|
|
int bit = (int)((page & 31) << 1);
|
||
|
|
|
||
|
|
int pageIndex = (int)(page >> PageToPteShift);
|
||
|
|
ref ulong pageRef = ref _pageBitmap[pageIndex];
|
||
|
|
|
||
|
|
ulong pte = Volatile.Read(ref pageRef);
|
||
|
|
|
||
|
|
return ((pte >> bit) & 3) != 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
/// <inheritdoc/>
|
||
|
|
public bool IsRangeMapped(ulong va, ulong size)
|
||
|
|
{
|
||
|
|
AssertValidAddressAndSize(va, size);
|
||
|
|
|
||
|
|
return IsRangeMappedImpl(va, size);
|
||
|
|
}
|
||
|
|
|
||
|
|
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
||
|
|
private void GetPageBlockRange(ulong pageStart, ulong pageEnd, out ulong startMask, out ulong endMask, out int pageIndex, out int pageEndIndex)
|
||
|
|
{
|
||
|
|
startMask = ulong.MaxValue << ((int)(pageStart & 31) << 1);
|
||
|
|
endMask = ulong.MaxValue >> (64 - ((int)(pageEnd & 31) << 1));
|
||
|
|
|
||
|
|
pageIndex = (int)(pageStart >> PageToPteShift);
|
||
|
|
pageEndIndex = (int)((pageEnd - 1) >> PageToPteShift);
|
||
|
|
}
|
||
|
|
|
||
|
|
private bool IsRangeMappedImpl(ulong va, ulong size)
|
||
|
|
{
|
||
|
|
int pages = GetPagesCount(va, size, out _);
|
||
|
|
|
||
|
|
if (pages == 1)
|
||
|
|
{
|
||
|
|
return IsMappedImpl(va);
|
||
|
|
}
|
||
|
|
|
||
|
|
ulong pageStart = va >> PageBits;
|
||
|
|
ulong pageEnd = pageStart + (ulong)pages;
|
||
|
|
|
||
|
|
GetPageBlockRange(pageStart, pageEnd, out ulong startMask, out ulong endMask, out int pageIndex, out int pageEndIndex);
|
||
|
|
|
||
|
|
// Check if either bit in each 2 bit page entry is set.
|
||
|
|
// OR the block with itself shifted down by 1, and check the first bit of each entry.
|
||
|
|
|
||
|
|
ulong mask = BlockMappedMask & startMask;
|
||
|
|
|
||
|
|
while (pageIndex <= pageEndIndex)
|
||
|
|
{
|
||
|
|
if (pageIndex == pageEndIndex)
|
||
|
|
{
|
||
|
|
mask &= endMask;
|
||
|
|
}
|
||
|
|
|
||
|
|
ref ulong pageRef = ref _pageBitmap[pageIndex++];
|
||
|
|
ulong pte = Volatile.Read(ref pageRef);
|
||
|
|
|
||
|
|
pte |= pte >> 1;
|
||
|
|
if ((pte & mask) != mask)
|
||
|
|
{
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
|
||
|
|
mask = BlockMappedMask;
|
||
|
|
}
|
||
|
|
|
||
|
|
return true;
|
||
|
|
}
|
||
|
|
|
||
|
|
private static void ThrowMemoryNotContiguous() => throw new MemoryNotContiguousException();
|
||
|
|
|
||
|
|
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
||
|
|
private bool IsContiguousAndMapped(ulong va, int size) => IsContiguous(va, size) && IsMapped(va);
|
||
|
|
|
||
|
|
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
||
|
|
private bool IsContiguous(ulong va, int size)
|
||
|
|
{
|
||
|
|
if (!ValidateAddress(va) || !ValidateAddressAndSize(va, (ulong)size))
|
||
|
|
{
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
|
||
|
|
int pages = GetPagesCount(va, (uint)size, out va);
|
||
|
|
|
||
|
|
for (int page = 0; page < pages - 1; page++)
|
||
|
|
{
|
||
|
|
if (!ValidateAddress(va + PageSize))
|
||
|
|
{
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (GetPhysicalAddressInternal(va) + PageSize != GetPhysicalAddressInternal(va + PageSize))
|
||
|
|
{
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
|
||
|
|
va += PageSize;
|
||
|
|
}
|
||
|
|
|
||
|
|
return true;
|
||
|
|
}
|
||
|
|
|
||
|
|
/// <inheritdoc/>
|
||
|
|
public IEnumerable<HostMemoryRange> GetHostRegions(ulong va, ulong size)
|
||
|
|
{
|
||
|
|
if (size == 0)
|
||
|
|
{
|
||
|
|
return Enumerable.Empty<HostMemoryRange>();
|
||
|
|
}
|
||
|
|
|
||
|
|
var guestRegions = GetPhysicalRegionsImpl(va, size);
|
||
|
|
if (guestRegions == null)
|
||
|
|
{
|
||
|
|
return null;
|
||
|
|
}
|
||
|
|
|
||
|
|
var regions = new HostMemoryRange[guestRegions.Count];
|
||
|
|
|
||
|
|
for (int i = 0; i < regions.Length; i++)
|
||
|
|
{
|
||
|
|
var guestRegion = guestRegions[i];
|
||
|
|
IntPtr pointer = _backingMemory.GetPointer(guestRegion.Address, guestRegion.Size);
|
||
|
|
regions[i] = new HostMemoryRange((nuint)(ulong)pointer, guestRegion.Size);
|
||
|
|
}
|
||
|
|
|
||
|
|
return regions;
|
||
|
|
}
|
||
|
|
|
||
|
|
/// <inheritdoc/>
|
||
|
|
public IEnumerable<MemoryRange> GetPhysicalRegions(ulong va, ulong size)
|
||
|
|
{
|
||
|
|
if (size == 0)
|
||
|
|
{
|
||
|
|
return Enumerable.Empty<MemoryRange>();
|
||
|
|
}
|
||
|
|
|
||
|
|
return GetPhysicalRegionsImpl(va, size);
|
||
|
|
}
|
||
|
|
|
||
|
|
private List<MemoryRange> GetPhysicalRegionsImpl(ulong va, ulong size)
|
||
|
|
{
|
||
|
|
if (!ValidateAddress(va) || !ValidateAddressAndSize(va, size))
|
||
|
|
{
|
||
|
|
return null;
|
||
|
|
}
|
||
|
|
|
||
|
|
int pages = GetPagesCount(va, (uint)size, out va);
|
||
|
|
|
||
|
|
var regions = new List<MemoryRange>();
|
||
|
|
|
||
|
|
ulong regionStart = GetPhysicalAddressInternal(va);
|
||
|
|
ulong regionSize = PageSize;
|
||
|
|
|
||
|
|
for (int page = 0; page < pages - 1; page++)
|
||
|
|
{
|
||
|
|
if (!ValidateAddress(va + PageSize))
|
||
|
|
{
|
||
|
|
return null;
|
||
|
|
}
|
||
|
|
|
||
|
|
ulong newPa = GetPhysicalAddressInternal(va + PageSize);
|
||
|
|
|
||
|
|
if (GetPhysicalAddressInternal(va) + PageSize != newPa)
|
||
|
|
{
|
||
|
|
regions.Add(new MemoryRange(regionStart, regionSize));
|
||
|
|
regionStart = newPa;
|
||
|
|
regionSize = 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
va += PageSize;
|
||
|
|
regionSize += PageSize;
|
||
|
|
}
|
||
|
|
|
||
|
|
regions.Add(new MemoryRange(regionStart, regionSize));
|
||
|
|
|
||
|
|
return regions;
|
||
|
|
}
|
||
|
|
|
||
|
|
private void ReadImpl(ulong va, Span<byte> data)
|
||
|
|
{
|
||
|
|
if (data.Length == 0)
|
||
|
|
{
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
try
|
||
|
|
{
|
||
|
|
AssertValidAddressAndSize(va, (ulong)data.Length);
|
||
|
|
|
||
|
|
int offset = 0, size;
|
||
|
|
|
||
|
|
if ((va & PageMask) != 0)
|
||
|
|
{
|
||
|
|
ulong pa = GetPhysicalAddressChecked(va);
|
||
|
|
|
||
|
|
size = Math.Min(data.Length, PageSize - (int)(va & PageMask));
|
||
|
|
|
||
|
|
_backingMemory.GetSpan(pa, size).CopyTo(data.Slice(0, size));
|
||
|
|
|
||
|
|
offset += size;
|
||
|
|
}
|
||
|
|
|
||
|
|
for (; offset < data.Length; offset += size)
|
||
|
|
{
|
||
|
|
ulong pa = GetPhysicalAddressChecked(va + (ulong)offset);
|
||
|
|
|
||
|
|
size = Math.Min(data.Length - offset, PageSize);
|
||
|
|
|
||
|
|
_backingMemory.GetSpan(pa, size).CopyTo(data.Slice(offset, size));
|
||
|
|
}
|
||
|
|
}
|
||
|
|
catch (InvalidMemoryRegionException)
|
||
|
|
{
|
||
|
|
if (_invalidAccessHandler == null || !_invalidAccessHandler(va))
|
||
|
|
{
|
||
|
|
throw;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/// <inheritdoc/>
|
||
|
|
/// <remarks>
|
||
|
|
/// This function also validates that the given range is both valid and mapped, and will throw if it is not.
|
||
|
|
/// </remarks>
|
||
|
|
public void SignalMemoryTracking(ulong va, ulong size, bool write, bool precise = false)
|
||
|
|
{
|
||
|
|
AssertValidAddressAndSize(va, size);
|
||
|
|
|
||
|
|
if (precise)
|
||
|
|
{
|
||
|
|
Tracking.VirtualMemoryEvent(va, size, write, precise: true);
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
// Software table, used for managed memory tracking.
|
||
|
|
|
||
|
|
int pages = GetPagesCount(va, size, out _);
|
||
|
|
ulong pageStart = va >> PageBits;
|
||
|
|
|
||
|
|
if (pages == 1)
|
||
|
|
{
|
||
|
|
ulong tag = (ulong)(write ? HostMappedPtBits.WriteTracked : HostMappedPtBits.ReadWriteTracked);
|
||
|
|
|
||
|
|
int bit = (int)((pageStart & 31) << 1);
|
||
|
|
|
||
|
|
int pageIndex = (int)(pageStart >> PageToPteShift);
|
||
|
|
ref ulong pageRef = ref _pageBitmap[pageIndex];
|
||
|
|
|
||
|
|
ulong pte = Volatile.Read(ref pageRef);
|
||
|
|
ulong state = ((pte >> bit) & 3);
|
||
|
|
|
||
|
|
if (state >= tag)
|
||
|
|
{
|
||
|
|
Tracking.VirtualMemoryEvent(va, size, write);
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
else if (state == 0)
|
||
|
|
{
|
||
|
|
ThrowInvalidMemoryRegionException($"Not mapped: va=0x{va:X16}, size=0x{size:X16}");
|
||
|
|
}
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
ulong pageEnd = pageStart + (ulong)pages;
|
||
|
|
|
||
|
|
GetPageBlockRange(pageStart, pageEnd, out ulong startMask, out ulong endMask, out int pageIndex, out int pageEndIndex);
|
||
|
|
|
||
|
|
ulong mask = startMask;
|
||
|
|
|
||
|
|
ulong anyTrackingTag = (ulong)HostMappedPtBits.WriteTrackedReplicated;
|
||
|
|
|
||
|
|
while (pageIndex <= pageEndIndex)
|
||
|
|
{
|
||
|
|
if (pageIndex == pageEndIndex)
|
||
|
|
{
|
||
|
|
mask &= endMask;
|
||
|
|
}
|
||
|
|
|
||
|
|
ref ulong pageRef = ref _pageBitmap[pageIndex++];
|
||
|
|
|
||
|
|
ulong pte = Volatile.Read(ref pageRef);
|
||
|
|
ulong mappedMask = mask & BlockMappedMask;
|
||
|
|
|
||
|
|
ulong mappedPte = pte | (pte >> 1);
|
||
|
|
if ((mappedPte & mappedMask) != mappedMask)
|
||
|
|
{
|
||
|
|
ThrowInvalidMemoryRegionException($"Not mapped: va=0x{va:X16}, size=0x{size:X16}");
|
||
|
|
}
|
||
|
|
|
||
|
|
pte &= mask;
|
||
|
|
if ((pte & anyTrackingTag) != 0) // Search for any tracking.
|
||
|
|
{
|
||
|
|
// Writes trigger any tracking.
|
||
|
|
// Only trigger tracking from reads if both bits are set on any page.
|
||
|
|
if (write || (pte & (pte >> 1) & BlockMappedMask) != 0)
|
||
|
|
{
|
||
|
|
Tracking.VirtualMemoryEvent(va, size, write);
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
mask = ulong.MaxValue;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/// <summary>
|
||
|
|
/// Computes the number of pages in a virtual address range.
|
||
|
|
/// </summary>
|
||
|
|
/// <param name="va">Virtual address of the range</param>
|
||
|
|
/// <param name="size">Size of the range</param>
|
||
|
|
/// <param name="startVa">The virtual address of the beginning of the first page</param>
|
||
|
|
/// <remarks>This function does not differentiate between allocated and unallocated pages.</remarks>
|
||
|
|
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
||
|
|
private int GetPagesCount(ulong va, ulong size, out ulong startVa)
|
||
|
|
{
|
||
|
|
// WARNING: Always check if ulong does not overflow during the operations.
|
||
|
|
startVa = va & ~(ulong)PageMask;
|
||
|
|
ulong vaSpan = (va - startVa + size + PageMask) & ~(ulong)PageMask;
|
||
|
|
|
||
|
|
return (int)(vaSpan / PageSize);
|
||
|
|
}
|
||
|
|
|
||
|
|
/// <inheritdoc/>
|
||
|
|
public void TrackingReprotect(ulong va, ulong size, MemoryPermission protection)
|
||
|
|
{
|
||
|
|
// Protection is inverted on software pages, since the default value is 0.
|
||
|
|
protection = (~protection) & MemoryPermission.ReadAndWrite;
|
||
|
|
|
||
|
|
int pages = GetPagesCount(va, size, out va);
|
||
|
|
ulong pageStart = va >> PageBits;
|
||
|
|
|
||
|
|
if (pages == 1)
|
||
|
|
{
|
||
|
|
ulong protTag = protection switch
|
||
|
|
{
|
||
|
|
MemoryPermission.None => (ulong)HostMappedPtBits.Mapped,
|
||
|
|
MemoryPermission.Write => (ulong)HostMappedPtBits.WriteTracked,
|
||
|
|
_ => (ulong)HostMappedPtBits.ReadWriteTracked,
|
||
|
|
};
|
||
|
|
|
||
|
|
int bit = (int)((pageStart & 31) << 1);
|
||
|
|
|
||
|
|
ulong tagMask = 3UL << bit;
|
||
|
|
ulong invTagMask = ~tagMask;
|
||
|
|
|
||
|
|
ulong tag = protTag << bit;
|
||
|
|
|
||
|
|
int pageIndex = (int)(pageStart >> PageToPteShift);
|
||
|
|
ref ulong pageRef = ref _pageBitmap[pageIndex];
|
||
|
|
|
||
|
|
ulong pte;
|
||
|
|
|
||
|
|
do
|
||
|
|
{
|
||
|
|
pte = Volatile.Read(ref pageRef);
|
||
|
|
}
|
||
|
|
while ((pte & tagMask) != 0 && Interlocked.CompareExchange(ref pageRef, (pte & invTagMask) | tag, pte) != pte);
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
ulong pageEnd = pageStart + (ulong)pages;
|
||
|
|
|
||
|
|
GetPageBlockRange(pageStart, pageEnd, out ulong startMask, out ulong endMask, out int pageIndex, out int pageEndIndex);
|
||
|
|
|
||
|
|
ulong mask = startMask;
|
||
|
|
|
||
|
|
ulong protTag = protection switch
|
||
|
|
{
|
||
|
|
MemoryPermission.None => (ulong)HostMappedPtBits.MappedReplicated,
|
||
|
|
MemoryPermission.Write => (ulong)HostMappedPtBits.WriteTrackedReplicated,
|
||
|
|
_ => (ulong)HostMappedPtBits.ReadWriteTrackedReplicated,
|
||
|
|
};
|
||
|
|
|
||
|
|
while (pageIndex <= pageEndIndex)
|
||
|
|
{
|
||
|
|
if (pageIndex == pageEndIndex)
|
||
|
|
{
|
||
|
|
mask &= endMask;
|
||
|
|
}
|
||
|
|
|
||
|
|
ref ulong pageRef = ref _pageBitmap[pageIndex++];
|
||
|
|
|
||
|
|
ulong pte;
|
||
|
|
ulong mappedMask;
|
||
|
|
|
||
|
|
// Change the protection of all 2 bit entries that are mapped.
|
||
|
|
do
|
||
|
|
{
|
||
|
|
pte = Volatile.Read(ref pageRef);
|
||
|
|
|
||
|
|
mappedMask = pte | (pte >> 1);
|
||
|
|
mappedMask |= (mappedMask & BlockMappedMask) << 1;
|
||
|
|
mappedMask &= mask; // Only update mapped pages within the given range.
|
||
|
|
}
|
||
|
|
while (Interlocked.CompareExchange(ref pageRef, (pte & (~mappedMask)) | (protTag & mappedMask), pte) != pte);
|
||
|
|
|
||
|
|
mask = ulong.MaxValue;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
protection = protection switch
|
||
|
|
{
|
||
|
|
MemoryPermission.None => MemoryPermission.ReadAndWrite,
|
||
|
|
MemoryPermission.Write => MemoryPermission.Read,
|
||
|
|
_ => MemoryPermission.None
|
||
|
|
};
|
||
|
|
|
||
|
|
_addressSpace.ReprotectUser(va, size, protection);
|
||
|
|
}
|
||
|
|
|
||
|
|
/// <inheritdoc/>
|
||
|
|
public CpuRegionHandle BeginTracking(ulong address, ulong size)
|
||
|
|
{
|
||
|
|
return new CpuRegionHandle(Tracking.BeginTracking(address, size));
|
||
|
|
}
|
||
|
|
|
||
|
|
/// <inheritdoc/>
|
||
|
|
public CpuMultiRegionHandle BeginGranularTracking(ulong address, ulong size, IEnumerable<IRegionHandle> handles, ulong granularity)
|
||
|
|
{
|
||
|
|
return new CpuMultiRegionHandle(Tracking.BeginGranularTracking(address, size, handles, granularity));
|
||
|
|
}
|
||
|
|
|
||
|
|
/// <inheritdoc/>
|
||
|
|
public CpuSmartMultiRegionHandle BeginSmartGranularTracking(ulong address, ulong size, ulong granularity)
|
||
|
|
{
|
||
|
|
return new CpuSmartMultiRegionHandle(Tracking.BeginSmartGranularTracking(address, size, granularity));
|
||
|
|
}
|
||
|
|
|
||
|
|
/// <summary>
|
||
|
|
/// Adds the given address mapping to the page table.
|
||
|
|
/// </summary>
|
||
|
|
/// <param name="va">Virtual memory address</param>
|
||
|
|
/// <param name="size">Size to be mapped</param>
|
||
|
|
private void AddMapping(ulong va, ulong size)
|
||
|
|
{
|
||
|
|
int pages = GetPagesCount(va, size, out _);
|
||
|
|
ulong pageStart = va >> PageBits;
|
||
|
|
ulong pageEnd = pageStart + (ulong)pages;
|
||
|
|
|
||
|
|
GetPageBlockRange(pageStart, pageEnd, out ulong startMask, out ulong endMask, out int pageIndex, out int pageEndIndex);
|
||
|
|
|
||
|
|
ulong mask = startMask;
|
||
|
|
|
||
|
|
while (pageIndex <= pageEndIndex)
|
||
|
|
{
|
||
|
|
if (pageIndex == pageEndIndex)
|
||
|
|
{
|
||
|
|
mask &= endMask;
|
||
|
|
}
|
||
|
|
|
||
|
|
ref ulong pageRef = ref _pageBitmap[pageIndex++];
|
||
|
|
|
||
|
|
ulong pte;
|
||
|
|
ulong mappedMask;
|
||
|
|
|
||
|
|
// Map all 2-bit entries that are unmapped.
|
||
|
|
do
|
||
|
|
{
|
||
|
|
pte = Volatile.Read(ref pageRef);
|
||
|
|
|
||
|
|
mappedMask = pte | (pte >> 1);
|
||
|
|
mappedMask |= (mappedMask & BlockMappedMask) << 1;
|
||
|
|
mappedMask |= ~mask; // Treat everything outside the range as mapped, thus unchanged.
|
||
|
|
}
|
||
|
|
while (Interlocked.CompareExchange(ref pageRef, (pte & mappedMask) | (BlockMappedMask & (~mappedMask)), pte) != pte);
|
||
|
|
|
||
|
|
mask = ulong.MaxValue;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/// <summary>
|
||
|
|
/// Removes the given address mapping from the page table.
|
||
|
|
/// </summary>
|
||
|
|
/// <param name="va">Virtual memory address</param>
|
||
|
|
/// <param name="size">Size to be unmapped</param>
|
||
|
|
private void RemoveMapping(ulong va, ulong size)
|
||
|
|
{
|
||
|
|
int pages = GetPagesCount(va, size, out _);
|
||
|
|
ulong pageStart = va >> PageBits;
|
||
|
|
ulong pageEnd = pageStart + (ulong)pages;
|
||
|
|
|
||
|
|
GetPageBlockRange(pageStart, pageEnd, out ulong startMask, out ulong endMask, out int pageIndex, out int pageEndIndex);
|
||
|
|
|
||
|
|
startMask = ~startMask;
|
||
|
|
endMask = ~endMask;
|
||
|
|
|
||
|
|
ulong mask = startMask;
|
||
|
|
|
||
|
|
while (pageIndex <= pageEndIndex)
|
||
|
|
{
|
||
|
|
if (pageIndex == pageEndIndex)
|
||
|
|
{
|
||
|
|
mask |= endMask;
|
||
|
|
}
|
||
|
|
|
||
|
|
ref ulong pageRef = ref _pageBitmap[pageIndex++];
|
||
|
|
ulong pte;
|
||
|
|
|
||
|
|
do
|
||
|
|
{
|
||
|
|
pte = Volatile.Read(ref pageRef);
|
||
|
|
}
|
||
|
|
while (Interlocked.CompareExchange(ref pageRef, pte & mask, pte) != pte);
|
||
|
|
|
||
|
|
mask = 0;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
private ulong GetPhysicalAddressChecked(ulong va)
|
||
|
|
{
|
||
|
|
if (!IsMapped(va))
|
||
|
|
{
|
||
|
|
ThrowInvalidMemoryRegionException($"Not mapped: va=0x{va:X16}");
|
||
|
|
}
|
||
|
|
|
||
|
|
return GetPhysicalAddressInternal(va);
|
||
|
|
}
|
||
|
|
|
||
|
|
private ulong GetPhysicalAddressInternal(ulong va)
|
||
|
|
{
|
||
|
|
return _pageTable.Read(va) + (va & PageMask);
|
||
|
|
}
|
||
|
|
|
||
|
|
/// <summary>
|
||
|
|
/// Disposes of resources used by the memory manager.
|
||
|
|
/// </summary>
|
||
|
|
protected override void Destroy()
|
||
|
|
{
|
||
|
|
_addressSpace.Dispose();
|
||
|
|
}
|
||
|
|
|
||
|
|
private static void ThrowInvalidMemoryRegionException(string message) => throw new InvalidMemoryRegionException(message);
|
||
|
|
}
|
||
|
|
}
|