Sse optimized the Vector & Scalar fp-to-integer conversion instructions (unsigned); improved the related Tests. (#656)
* Update InstEmitSimdCvt.cs * Update CpuTestSimdCvt.cs * Update CpuTestSimd.cs * Update CpuTestSimdShImm.cs * Update InstEmitSimdCvt.cs
This commit is contained in:
parent
af65ed3930
commit
233fc95e1e
4 changed files with 475 additions and 292 deletions
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@ -125,14 +125,7 @@ namespace ChocolArm64.Instructions
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public static void Fcvtms_Gp(ILEmitterCtx context)
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public static void Fcvtms_Gp(ILEmitterCtx context)
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{
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{
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if (Optimizations.UseSse41)
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EmitFcvt_s_Gp(context, () => EmitUnaryMathCall(context, nameof(Math.Floor)));
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{
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EmitSse41Fcvt_Signed_Gp(context, RoundMode.TowardsMinusInfinity, isFixed: false);
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}
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else
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{
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EmitFcvt_s_Gp(context, () => EmitUnaryMathCall(context, nameof(Math.Floor)));
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}
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}
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}
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public static void Fcvtmu_Gp(ILEmitterCtx context)
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public static void Fcvtmu_Gp(ILEmitterCtx context)
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@ -216,7 +209,7 @@ namespace ChocolArm64.Instructions
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{
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{
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if (Optimizations.UseSse41)
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if (Optimizations.UseSse41)
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{
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{
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EmitSse41Fcvt_Signed(context, RoundMode.ToNearest, isFixed: false, scalar: true);
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EmitSse41Fcvt_Signed(context, RoundMode.ToNearest, scalar: true);
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}
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}
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else
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else
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{
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{
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@ -228,7 +221,7 @@ namespace ChocolArm64.Instructions
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{
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{
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if (Optimizations.UseSse41)
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if (Optimizations.UseSse41)
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{
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{
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EmitSse41Fcvt_Signed(context, RoundMode.ToNearest, isFixed: false, scalar: false);
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EmitSse41Fcvt_Signed(context, RoundMode.ToNearest, scalar: false);
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}
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}
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else
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else
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{
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{
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@ -238,24 +231,31 @@ namespace ChocolArm64.Instructions
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public static void Fcvtnu_S(ILEmitterCtx context)
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public static void Fcvtnu_S(ILEmitterCtx context)
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{
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{
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EmitFcvtn(context, signed: false, scalar: true);
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if (Optimizations.UseSse41)
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{
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EmitSse41Fcvt_Unsigned(context, RoundMode.ToNearest, scalar: true);
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}
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else
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{
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EmitFcvtn(context, signed: false, scalar: true);
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}
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}
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}
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public static void Fcvtnu_V(ILEmitterCtx context)
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public static void Fcvtnu_V(ILEmitterCtx context)
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{
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{
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EmitFcvtn(context, signed: false, scalar: false);
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if (Optimizations.UseSse41)
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{
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EmitSse41Fcvt_Unsigned(context, RoundMode.ToNearest, scalar: false);
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}
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else
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{
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EmitFcvtn(context, signed: false, scalar: false);
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}
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}
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}
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public static void Fcvtps_Gp(ILEmitterCtx context)
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public static void Fcvtps_Gp(ILEmitterCtx context)
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{
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{
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if (Optimizations.UseSse41)
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EmitFcvt_s_Gp(context, () => EmitUnaryMathCall(context, nameof(Math.Ceiling)));
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{
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EmitSse41Fcvt_Signed_Gp(context, RoundMode.TowardsPlusInfinity, isFixed: false);
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}
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else
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{
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EmitFcvt_s_Gp(context, () => EmitUnaryMathCall(context, nameof(Math.Ceiling)));
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}
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}
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}
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public static void Fcvtpu_Gp(ILEmitterCtx context)
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public static void Fcvtpu_Gp(ILEmitterCtx context)
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@ -265,33 +265,19 @@ namespace ChocolArm64.Instructions
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public static void Fcvtzs_Gp(ILEmitterCtx context)
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public static void Fcvtzs_Gp(ILEmitterCtx context)
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{
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{
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if (Optimizations.UseSse41)
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EmitFcvt_s_Gp(context, () => { });
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{
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EmitSse41Fcvt_Signed_Gp(context, RoundMode.TowardsZero, isFixed: false);
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}
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else
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{
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EmitFcvt_s_Gp(context, () => { });
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}
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}
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}
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public static void Fcvtzs_Gp_Fixed(ILEmitterCtx context)
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public static void Fcvtzs_Gp_Fixed(ILEmitterCtx context)
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{
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{
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if (Optimizations.UseSse41)
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EmitFcvtzs_Gp_Fixed(context);
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{
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EmitSse41Fcvt_Signed_Gp(context, RoundMode.TowardsZero, isFixed: true);
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}
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else
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{
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EmitFcvtzs_Gp_Fixed(context);
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}
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}
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}
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public static void Fcvtzs_S(ILEmitterCtx context)
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public static void Fcvtzs_S(ILEmitterCtx context)
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{
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{
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if (Optimizations.UseSse41)
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if (Optimizations.UseSse41)
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{
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{
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EmitSse41Fcvt_Signed(context, RoundMode.TowardsZero, isFixed: false, scalar: true);
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EmitSse41Fcvt_Signed(context, RoundMode.TowardsZero, scalar: true);
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}
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}
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else
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else
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{
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{
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@ -303,7 +289,7 @@ namespace ChocolArm64.Instructions
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{
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{
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if (Optimizations.UseSse41)
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if (Optimizations.UseSse41)
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{
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{
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EmitSse41Fcvt_Signed(context, RoundMode.TowardsZero, isFixed: false, scalar: false);
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EmitSse41Fcvt_Signed(context, RoundMode.TowardsZero, scalar: false);
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}
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}
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else
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else
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{
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{
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@ -315,7 +301,7 @@ namespace ChocolArm64.Instructions
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{
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{
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if (Optimizations.UseSse41)
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if (Optimizations.UseSse41)
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{
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{
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EmitSse41Fcvt_Signed(context, RoundMode.TowardsZero, isFixed: true, scalar: false);
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EmitSse41Fcvt_Signed(context, RoundMode.TowardsZero, scalar: false);
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}
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}
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else
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else
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{
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{
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@ -335,17 +321,38 @@ namespace ChocolArm64.Instructions
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public static void Fcvtzu_S(ILEmitterCtx context)
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public static void Fcvtzu_S(ILEmitterCtx context)
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{
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{
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EmitFcvtz(context, signed: false, scalar: true);
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if (Optimizations.UseSse41)
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{
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EmitSse41Fcvt_Unsigned(context, RoundMode.TowardsZero, scalar: true);
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}
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else
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{
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EmitFcvtz(context, signed: false, scalar: true);
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}
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}
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}
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public static void Fcvtzu_V(ILEmitterCtx context)
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public static void Fcvtzu_V(ILEmitterCtx context)
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{
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{
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EmitFcvtz(context, signed: false, scalar: false);
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if (Optimizations.UseSse41)
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{
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EmitSse41Fcvt_Unsigned(context, RoundMode.TowardsZero, scalar: false);
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}
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else
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{
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EmitFcvtz(context, signed: false, scalar: false);
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}
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}
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}
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public static void Fcvtzu_V_Fixed(ILEmitterCtx context)
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public static void Fcvtzu_V_Fixed(ILEmitterCtx context)
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{
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{
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EmitFcvtz(context, signed: false, scalar: false);
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if (Optimizations.UseSse41)
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{
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EmitSse41Fcvt_Unsigned(context, RoundMode.TowardsZero, scalar: false);
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}
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else
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{
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EmitFcvtz(context, signed: false, scalar: false);
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}
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}
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}
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public static void Scvtf_Gp(ILEmitterCtx context)
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public static void Scvtf_Gp(ILEmitterCtx context)
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@ -804,168 +811,7 @@ namespace ChocolArm64.Instructions
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}
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}
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}
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}
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private static void EmitSse41Fcvt_Signed_Gp(ILEmitterCtx context, RoundMode roundMode, bool isFixed)
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private static void EmitSse41Fcvt_Signed(ILEmitterCtx context, RoundMode roundMode, bool scalar)
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{
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OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp;
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if (op.Size == 0)
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{
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Type[] typesCmpMul = new Type[] { typeof(Vector128<float>), typeof(Vector128<float>) };
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Type[] typesAnd = new Type[] { typeof(Vector128<long>), typeof(Vector128<long>) };
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Type[] typesRndCvt = new Type[] { typeof(Vector128<float>) };
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Type[] typesCvt = new Type[] { typeof(Vector128<int>) };
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Type[] typesSav = new Type[] { typeof(int) };
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//string nameCvt;
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int fpMaxVal;
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if (op.RegisterSize == RegisterSize.Int32)
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{
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//nameCvt = nameof(Sse.ConvertToInt32);
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fpMaxVal = 0x4F000000; // 2.14748365E9f (2147483648)
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}
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else
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{
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//nameCvt = nameof(Sse.ConvertToInt64);
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fpMaxVal = 0x5F000000; // 9.223372E18f (9223372036854775808)
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}
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context.EmitLdvec(op.Rn);
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context.EmitLdvec(op.Rn);
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context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.CompareOrdered), typesCmpMul));
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context.EmitLdvec(op.Rn);
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.And), typesAnd));
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if (isFixed)
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{
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// BitConverter.Int32BitsToSingle(fpScaled) == MathF.Pow(2f, op.FBits)
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int fpScaled = 0x40000000 + (op.FBits - 1) * 0x800000;
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context.EmitLdc_I4(fpScaled);
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav));
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context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.Multiply), typesCmpMul));
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}
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context.EmitCall(typeof(Sse41).GetMethod(GetSse41NameRnd(roundMode), typesRndCvt));
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context.EmitStvectmp();
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context.EmitLdvectmp();
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// TODO: Use Sse.ConvertToInt64 once it is fixed (in .NET Core 3.0),
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// remove the following if/else and uncomment the code.
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//context.EmitCall(typeof(Sse).GetMethod(nameCvt, typesRndCvt));
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if (op.RegisterSize == RegisterSize.Int32)
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{
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context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.ConvertToInt32), typesRndCvt));
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}
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else
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{
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ConvertToVector128Double), typesRndCvt));
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ConvertToInt64), new Type[] { typeof(Vector128<double>) }));
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}
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context.EmitLdvectmp();
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context.EmitLdc_I4(fpMaxVal);
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav));
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context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.CompareGreaterThanOrEqual), typesCmpMul));
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ConvertToInt32), typesCvt));
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if (op.RegisterSize == RegisterSize.Int32)
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{
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context.Emit(OpCodes.Xor);
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context.Emit(OpCodes.Conv_U8);
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}
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else
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{
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context.Emit(OpCodes.Conv_I8);
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context.Emit(OpCodes.Xor);
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}
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context.EmitStintzr(op.Rd);
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}
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else /* if (op.Size == 1) */
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{
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Type[] typesCmpMul = new Type[] { typeof(Vector128<double>), typeof(Vector128<double>) };
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Type[] typesAnd = new Type[] { typeof(Vector128<long>), typeof(Vector128<long>) };
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Type[] typesRndCvt = new Type[] { typeof(Vector128<double>) };
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Type[] typesCvt = new Type[] { typeof(Vector128<int>) };
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Type[] typesSav = new Type[] { typeof(long) };
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string nameCvt;
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long fpMaxVal;
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if (op.RegisterSize == RegisterSize.Int32)
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{
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nameCvt = nameof(Sse2.ConvertToInt32);
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fpMaxVal = 0x41E0000000000000L; // 2147483648.0000000d (2147483648)
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}
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else
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{
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nameCvt = nameof(Sse2.ConvertToInt64);
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fpMaxVal = 0x43E0000000000000L; // 9.2233720368547760E18d (9223372036854775808)
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}
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context.EmitLdvec(op.Rn);
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context.EmitLdvec(op.Rn);
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.CompareOrdered), typesCmpMul));
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context.EmitLdvec(op.Rn);
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.And), typesAnd));
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if (isFixed)
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{
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// BitConverter.Int64BitsToDouble(fpScaled) == Math.Pow(2d, op.FBits)
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long fpScaled = 0x4000000000000000L + (op.FBits - 1) * 0x10000000000000L;
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context.EmitLdc_I8(fpScaled);
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav));
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.Multiply), typesCmpMul));
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}
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context.EmitCall(typeof(Sse41).GetMethod(GetSse41NameRnd(roundMode), typesRndCvt));
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context.EmitStvectmp();
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context.EmitLdvectmp();
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context.EmitCall(typeof(Sse2).GetMethod(nameCvt, typesRndCvt));
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context.EmitLdvectmp();
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context.EmitLdc_I8(fpMaxVal);
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav));
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.CompareGreaterThanOrEqual), typesCmpMul));
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context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ConvertToInt32), typesCvt));
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if (op.RegisterSize == RegisterSize.Int32)
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{
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context.Emit(OpCodes.Xor);
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context.Emit(OpCodes.Conv_U8);
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}
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else
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{
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context.Emit(OpCodes.Conv_I8);
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context.Emit(OpCodes.Xor);
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}
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context.EmitStintzr(op.Rd);
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}
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}
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private static void EmitSse41Fcvt_Signed(ILEmitterCtx context, RoundMode roundMode, bool isFixed, bool scalar)
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{
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{
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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@ -974,23 +820,22 @@ namespace ChocolArm64.Instructions
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if (sizeF == 0)
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if (sizeF == 0)
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{
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{
|
||||||
Type[] typesCmpMul = new Type[] { typeof(Vector128<float>), typeof(Vector128<float>) };
|
Type[] types = new Type[] { typeof(Vector128<float>), typeof(Vector128<float>) };
|
||||||
Type[] typesAndXor = new Type[] { typeof(Vector128<long>), typeof(Vector128<long>) };
|
|
||||||
Type[] typesRndCvt = new Type[] { typeof(Vector128<float>) };
|
Type[] typesRndCvt = new Type[] { typeof(Vector128<float>) };
|
||||||
Type[] typesSav = new Type[] { typeof(int) };
|
Type[] typesSav = new Type[] { typeof(int) };
|
||||||
|
|
||||||
context.EmitLdvec(op.Rn);
|
context.EmitLdvec(op.Rn);
|
||||||
context.EmitLdvec(op.Rn);
|
context.EmitLdvec(op.Rn);
|
||||||
|
|
||||||
context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.CompareOrdered), typesCmpMul));
|
context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.CompareOrdered), types));
|
||||||
|
|
||||||
context.EmitLdvec(op.Rn);
|
context.EmitLdvec(op.Rn);
|
||||||
|
|
||||||
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.And), typesAndXor));
|
context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.And), types));
|
||||||
|
|
||||||
if (isFixed)
|
if (op is OpCodeSimdShImm64 fixedOp)
|
||||||
{
|
{
|
||||||
int fBits = GetImmShr((OpCodeSimdShImm64)op);
|
int fBits = GetImmShr(fixedOp);
|
||||||
|
|
||||||
// BitConverter.Int32BitsToSingle(fpScaled) == MathF.Pow(2f, fBits)
|
// BitConverter.Int32BitsToSingle(fpScaled) == MathF.Pow(2f, fBits)
|
||||||
int fpScaled = 0x40000000 + (fBits - 1) * 0x800000;
|
int fpScaled = 0x40000000 + (fBits - 1) * 0x800000;
|
||||||
|
@ -998,7 +843,7 @@ namespace ChocolArm64.Instructions
|
||||||
context.EmitLdc_I4(fpScaled);
|
context.EmitLdc_I4(fpScaled);
|
||||||
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav));
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav));
|
||||||
|
|
||||||
context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.Multiply), typesCmpMul));
|
context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.Multiply), types));
|
||||||
}
|
}
|
||||||
|
|
||||||
context.EmitCall(typeof(Sse41).GetMethod(GetSse41NameRnd(roundMode), typesRndCvt));
|
context.EmitCall(typeof(Sse41).GetMethod(GetSse41NameRnd(roundMode), typesRndCvt));
|
||||||
|
@ -1013,9 +858,9 @@ namespace ChocolArm64.Instructions
|
||||||
context.EmitLdc_I4(0x4F000000); // 2.14748365E9f (2147483648)
|
context.EmitLdc_I4(0x4F000000); // 2.14748365E9f (2147483648)
|
||||||
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav));
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav));
|
||||||
|
|
||||||
context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.CompareGreaterThanOrEqual), typesCmpMul));
|
context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.CompareGreaterThanOrEqual), types));
|
||||||
|
|
||||||
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.Xor), typesAndXor));
|
context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.Xor), types));
|
||||||
|
|
||||||
context.EmitStvec(op.Rd);
|
context.EmitStvec(op.Rd);
|
||||||
|
|
||||||
|
@ -1030,24 +875,23 @@ namespace ChocolArm64.Instructions
|
||||||
}
|
}
|
||||||
else /* if (sizeF == 1) */
|
else /* if (sizeF == 1) */
|
||||||
{
|
{
|
||||||
Type[] typesCmpMulUpk = new Type[] { typeof(Vector128<double>), typeof(Vector128<double>) };
|
Type[] types = new Type[] { typeof(Vector128<double>), typeof(Vector128<double>) };
|
||||||
Type[] typesAndXor = new Type[] { typeof(Vector128<long>), typeof(Vector128<long>) };
|
Type[] typesRndCvt = new Type[] { typeof(Vector128<double>) };
|
||||||
Type[] typesRndCvt = new Type[] { typeof(Vector128<double>) };
|
Type[] typesSv = new Type[] { typeof(long), typeof(long) };
|
||||||
Type[] typesSv = new Type[] { typeof(long), typeof(long) };
|
Type[] typesSav = new Type[] { typeof(long) };
|
||||||
Type[] typesSav = new Type[] { typeof(long) };
|
|
||||||
|
|
||||||
context.EmitLdvec(op.Rn);
|
context.EmitLdvec(op.Rn);
|
||||||
context.EmitLdvec(op.Rn);
|
context.EmitLdvec(op.Rn);
|
||||||
|
|
||||||
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.CompareOrdered), typesCmpMulUpk));
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.CompareOrdered), types));
|
||||||
|
|
||||||
context.EmitLdvec(op.Rn);
|
context.EmitLdvec(op.Rn);
|
||||||
|
|
||||||
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.And), typesAndXor));
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.And), types));
|
||||||
|
|
||||||
if (isFixed)
|
if (op is OpCodeSimdShImm64 fixedOp)
|
||||||
{
|
{
|
||||||
int fBits = GetImmShr((OpCodeSimdShImm64)op);
|
int fBits = GetImmShr(fixedOp);
|
||||||
|
|
||||||
// BitConverter.Int64BitsToDouble(fpScaled) == Math.Pow(2d, fBits)
|
// BitConverter.Int64BitsToDouble(fpScaled) == Math.Pow(2d, fBits)
|
||||||
long fpScaled = 0x4000000000000000L + (fBits - 1) * 0x10000000000000L;
|
long fpScaled = 0x4000000000000000L + (fBits - 1) * 0x10000000000000L;
|
||||||
|
@ -1055,19 +899,26 @@ namespace ChocolArm64.Instructions
|
||||||
context.EmitLdc_I8(fpScaled);
|
context.EmitLdc_I8(fpScaled);
|
||||||
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav));
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav));
|
||||||
|
|
||||||
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.Multiply), typesCmpMulUpk));
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.Multiply), types));
|
||||||
}
|
}
|
||||||
|
|
||||||
context.EmitCall(typeof(Sse41).GetMethod(GetSse41NameRnd(roundMode), typesRndCvt));
|
context.EmitCall(typeof(Sse41).GetMethod(GetSse41NameRnd(roundMode), typesRndCvt));
|
||||||
|
|
||||||
context.EmitStvectmp();
|
context.EmitStvectmp();
|
||||||
context.EmitLdvectmp();
|
|
||||||
|
|
||||||
context.EmitLdvectmp();
|
if (!scalar)
|
||||||
|
{
|
||||||
|
context.EmitLdvectmp();
|
||||||
|
context.EmitLdvectmp();
|
||||||
|
|
||||||
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackHigh), typesCmpMulUpk));
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackHigh), types));
|
||||||
|
|
||||||
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ConvertToInt64), typesRndCvt));
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ConvertToInt64), typesRndCvt));
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
context.EmitLdc_I8(0L);
|
||||||
|
}
|
||||||
|
|
||||||
context.EmitLdvectmp();
|
context.EmitLdvectmp();
|
||||||
|
|
||||||
|
@ -1080,9 +931,223 @@ namespace ChocolArm64.Instructions
|
||||||
context.EmitLdc_I8(0x43E0000000000000L); // 9.2233720368547760E18d (9223372036854775808)
|
context.EmitLdc_I8(0x43E0000000000000L); // 9.2233720368547760E18d (9223372036854775808)
|
||||||
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav));
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav));
|
||||||
|
|
||||||
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.CompareGreaterThanOrEqual), typesCmpMulUpk));
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.CompareGreaterThanOrEqual), types));
|
||||||
|
|
||||||
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.Xor), typesAndXor));
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.Xor), types));
|
||||||
|
|
||||||
|
context.EmitStvec(op.Rd);
|
||||||
|
|
||||||
|
if (scalar)
|
||||||
|
{
|
||||||
|
EmitVectorZeroUpper(context, op.Rd);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
private static void EmitSse41Fcvt_Unsigned(ILEmitterCtx context, RoundMode roundMode, bool scalar)
|
||||||
|
{
|
||||||
|
OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
|
||||||
|
|
||||||
|
// sizeF == ((OpCodeSimdShImm64)op).Size - 2
|
||||||
|
int sizeF = op.Size & 1;
|
||||||
|
|
||||||
|
if (sizeF == 0)
|
||||||
|
{
|
||||||
|
Type[] types = new Type[] { typeof(Vector128<float>), typeof(Vector128<float>) };
|
||||||
|
Type[] typesAdd = new Type[] { typeof(Vector128<int>), typeof(Vector128<int>) };
|
||||||
|
Type[] typesRndCvt = new Type[] { typeof(Vector128<float>) };
|
||||||
|
Type[] typesSav = new Type[] { typeof(int) };
|
||||||
|
|
||||||
|
context.EmitLdvec(op.Rn);
|
||||||
|
context.EmitLdvec(op.Rn);
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.CompareOrdered), types));
|
||||||
|
|
||||||
|
context.EmitLdvec(op.Rn);
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.And), types));
|
||||||
|
|
||||||
|
if (op is OpCodeSimdShImm64 fixedOp)
|
||||||
|
{
|
||||||
|
int fBits = GetImmShr(fixedOp);
|
||||||
|
|
||||||
|
// BitConverter.Int32BitsToSingle(fpScaled) == MathF.Pow(2f, fBits)
|
||||||
|
int fpScaled = 0x40000000 + (fBits - 1) * 0x800000;
|
||||||
|
|
||||||
|
context.EmitLdc_I4(fpScaled);
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav));
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.Multiply), types));
|
||||||
|
}
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse41).GetMethod(GetSse41NameRnd(roundMode), typesRndCvt));
|
||||||
|
|
||||||
|
context.Emit(OpCodes.Dup);
|
||||||
|
|
||||||
|
VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.CompareGreaterThan), types));
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.And), types));
|
||||||
|
|
||||||
|
context.EmitStvectmp();
|
||||||
|
context.EmitLdvectmp();
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ConvertToVector128Int32), typesRndCvt));
|
||||||
|
|
||||||
|
context.EmitLdvectmp();
|
||||||
|
|
||||||
|
context.EmitLdc_I4(0x4F000000); // 2.14748365E9f (2147483648)
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav));
|
||||||
|
|
||||||
|
context.EmitStvectmp2();
|
||||||
|
context.EmitLdvectmp2();
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.Subtract), types));
|
||||||
|
|
||||||
|
context.Emit(OpCodes.Dup);
|
||||||
|
|
||||||
|
VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.CompareGreaterThan), types));
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.And), types));
|
||||||
|
|
||||||
|
context.EmitStvectmp();
|
||||||
|
context.EmitLdvectmp();
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ConvertToVector128Int32), typesRndCvt));
|
||||||
|
|
||||||
|
context.EmitLdvectmp();
|
||||||
|
context.EmitLdvectmp2();
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.CompareGreaterThanOrEqual), types));
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.Xor), types));
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.Add), typesAdd));
|
||||||
|
|
||||||
|
context.EmitStvec(op.Rd);
|
||||||
|
|
||||||
|
if (scalar)
|
||||||
|
{
|
||||||
|
EmitVectorZero32_128(context, op.Rd);
|
||||||
|
}
|
||||||
|
else if (op.RegisterSize == RegisterSize.Simd64)
|
||||||
|
{
|
||||||
|
EmitVectorZeroUpper(context, op.Rd);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else /* if (sizeF == 1) */
|
||||||
|
{
|
||||||
|
Type[] types = new Type[] { typeof(Vector128<double>), typeof(Vector128<double>) };
|
||||||
|
Type[] typesAdd = new Type[] { typeof(Vector128<long>), typeof(Vector128<long>) };
|
||||||
|
Type[] typesRndCvt = new Type[] { typeof(Vector128<double>) };
|
||||||
|
Type[] typesSv = new Type[] { typeof(long), typeof(long) };
|
||||||
|
Type[] typesSav = new Type[] { typeof(long) };
|
||||||
|
|
||||||
|
context.EmitLdvec(op.Rn);
|
||||||
|
context.EmitLdvec(op.Rn);
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.CompareOrdered), types));
|
||||||
|
|
||||||
|
context.EmitLdvec(op.Rn);
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.And), types));
|
||||||
|
|
||||||
|
if (op is OpCodeSimdShImm64 fixedOp)
|
||||||
|
{
|
||||||
|
int fBits = GetImmShr(fixedOp);
|
||||||
|
|
||||||
|
// BitConverter.Int64BitsToDouble(fpScaled) == Math.Pow(2d, fBits)
|
||||||
|
long fpScaled = 0x4000000000000000L + (fBits - 1) * 0x10000000000000L;
|
||||||
|
|
||||||
|
context.EmitLdc_I8(fpScaled);
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav));
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.Multiply), types));
|
||||||
|
}
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse41).GetMethod(GetSse41NameRnd(roundMode), typesRndCvt));
|
||||||
|
|
||||||
|
context.Emit(OpCodes.Dup);
|
||||||
|
|
||||||
|
VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.CompareGreaterThan), types));
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.And), types));
|
||||||
|
|
||||||
|
context.EmitStvectmp();
|
||||||
|
|
||||||
|
if (!scalar)
|
||||||
|
{
|
||||||
|
context.EmitLdvectmp();
|
||||||
|
context.EmitLdvectmp();
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackHigh), types));
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ConvertToInt64), typesRndCvt));
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
context.EmitLdc_I8(0L);
|
||||||
|
}
|
||||||
|
|
||||||
|
context.EmitLdvectmp();
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ConvertToInt64), typesRndCvt));
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetVector128), typesSv));
|
||||||
|
|
||||||
|
context.EmitLdvectmp();
|
||||||
|
|
||||||
|
context.EmitLdc_I8(0x43E0000000000000L); // 9.2233720368547760E18d (9223372036854775808)
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetAllVector128), typesSav));
|
||||||
|
|
||||||
|
context.EmitStvectmp2();
|
||||||
|
context.EmitLdvectmp2();
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.Subtract), types));
|
||||||
|
|
||||||
|
context.Emit(OpCodes.Dup);
|
||||||
|
|
||||||
|
VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.CompareGreaterThan), types));
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.And), types));
|
||||||
|
|
||||||
|
context.EmitStvectmp();
|
||||||
|
|
||||||
|
if (!scalar)
|
||||||
|
{
|
||||||
|
context.EmitLdvectmp();
|
||||||
|
context.EmitLdvectmp();
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.UnpackHigh), types));
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ConvertToInt64), typesRndCvt));
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
context.EmitLdc_I8(0L);
|
||||||
|
}
|
||||||
|
|
||||||
|
context.EmitLdvectmp();
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.ConvertToInt64), typesRndCvt));
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.SetVector128), typesSv));
|
||||||
|
|
||||||
|
context.EmitLdvectmp();
|
||||||
|
context.EmitLdvectmp2();
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.CompareGreaterThanOrEqual), types));
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.Xor), types));
|
||||||
|
|
||||||
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.Add), typesAdd));
|
||||||
|
|
||||||
context.EmitStvec(op.Rd);
|
context.EmitStvec(op.Rd);
|
||||||
|
|
||||||
|
|
|
@ -2,6 +2,7 @@
|
||||||
|
|
||||||
using NUnit.Framework;
|
using NUnit.Framework;
|
||||||
|
|
||||||
|
using System;
|
||||||
using System.Collections.Generic;
|
using System.Collections.Generic;
|
||||||
using System.Runtime.Intrinsics;
|
using System.Runtime.Intrinsics;
|
||||||
|
|
||||||
|
@ -172,15 +173,20 @@ namespace Ryujinx.Tests.Cpu
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
private static IEnumerable<ulong> _1S_F_Cvt_()
|
private static IEnumerable<ulong> _1S_F_W_()
|
||||||
{
|
{
|
||||||
// int
|
// int
|
||||||
yield return 0x00000000CF000001; // -2.1474839E9f (-2147483904)
|
yield return 0x00000000CF000001ul; // -2.1474839E9f (-2147483904)
|
||||||
yield return 0x00000000CF000000; // -2.14748365E9f (-2147483648)
|
yield return 0x00000000CF000000ul; // -2.14748365E9f (-2147483648)
|
||||||
yield return 0x00000000CEFFFFFF; // -2.14748352E9f (-2147483520)
|
yield return 0x00000000CEFFFFFFul; // -2.14748352E9f (-2147483520)
|
||||||
yield return 0x000000004F000001; // 2.1474839E9f (2147483904)
|
yield return 0x000000004F000001ul; // 2.1474839E9f (2147483904)
|
||||||
yield return 0x000000004F000000; // 2.14748365E9f (2147483648)
|
yield return 0x000000004F000000ul; // 2.14748365E9f (2147483648)
|
||||||
yield return 0x000000004EFFFFFF; // 2.14748352E9f (2147483520)
|
yield return 0x000000004EFFFFFFul; // 2.14748352E9f (2147483520)
|
||||||
|
|
||||||
|
// uint
|
||||||
|
yield return 0x000000004F800001ul; // 4.2949678E9f (4294967808)
|
||||||
|
yield return 0x000000004F800000ul; // 4.2949673E9f (4294967296)
|
||||||
|
yield return 0x000000004F7FFFFFul; // 4.29496704E9f (4294967040)
|
||||||
|
|
||||||
yield return 0x00000000FF7FFFFFul; // -Max Normal (float.MinValue)
|
yield return 0x00000000FF7FFFFFul; // -Max Normal (float.MinValue)
|
||||||
yield return 0x0000000080800000ul; // -Min Normal
|
yield return 0x0000000080800000ul; // -Min Normal
|
||||||
|
@ -214,11 +220,20 @@ namespace Ryujinx.Tests.Cpu
|
||||||
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
||||||
{
|
{
|
||||||
ulong grbg = TestContext.CurrentContext.Random.NextUInt();
|
ulong grbg = TestContext.CurrentContext.Random.NextUInt();
|
||||||
ulong rnd1 = GenNormalS();
|
|
||||||
ulong rnd2 = GenSubnormalS();
|
ulong rnd1 = (uint)BitConverter.SingleToInt32Bits(
|
||||||
|
(float)((int)TestContext.CurrentContext.Random.NextUInt()));
|
||||||
|
ulong rnd2 = (uint)BitConverter.SingleToInt32Bits(
|
||||||
|
(float)((uint)TestContext.CurrentContext.Random.NextUInt()));
|
||||||
|
|
||||||
|
ulong rnd3 = GenNormalS();
|
||||||
|
ulong rnd4 = GenSubnormalS();
|
||||||
|
|
||||||
yield return (grbg << 32) | rnd1;
|
yield return (grbg << 32) | rnd1;
|
||||||
yield return (grbg << 32) | rnd2;
|
yield return (grbg << 32) | rnd2;
|
||||||
|
|
||||||
|
yield return (grbg << 32) | rnd3;
|
||||||
|
yield return (grbg << 32) | rnd4;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -263,15 +278,20 @@ namespace Ryujinx.Tests.Cpu
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
private static IEnumerable<ulong> _2S_F_Cvt_()
|
private static IEnumerable<ulong> _2S_F_W_()
|
||||||
{
|
{
|
||||||
// int
|
// int
|
||||||
yield return 0xCF000001CF000001; // -2.1474839E9f (-2147483904)
|
yield return 0xCF000001CF000001ul; // -2.1474839E9f (-2147483904)
|
||||||
yield return 0xCF000000CF000000; // -2.14748365E9f (-2147483648)
|
yield return 0xCF000000CF000000ul; // -2.14748365E9f (-2147483648)
|
||||||
yield return 0xCEFFFFFFCEFFFFFF; // -2.14748352E9f (-2147483520)
|
yield return 0xCEFFFFFFCEFFFFFFul; // -2.14748352E9f (-2147483520)
|
||||||
yield return 0x4F0000014F000001; // 2.1474839E9f (2147483904)
|
yield return 0x4F0000014F000001ul; // 2.1474839E9f (2147483904)
|
||||||
yield return 0x4F0000004F000000; // 2.14748365E9f (2147483648)
|
yield return 0x4F0000004F000000ul; // 2.14748365E9f (2147483648)
|
||||||
yield return 0x4EFFFFFF4EFFFFFF; // 2.14748352E9f (2147483520)
|
yield return 0x4EFFFFFF4EFFFFFFul; // 2.14748352E9f (2147483520)
|
||||||
|
|
||||||
|
// uint
|
||||||
|
yield return 0x4F8000014F800001ul; // 4.2949678E9f (4294967808)
|
||||||
|
yield return 0x4F8000004F800000ul; // 4.2949673E9f (4294967296)
|
||||||
|
yield return 0x4F7FFFFF4F7FFFFFul; // 4.29496704E9f (4294967040)
|
||||||
|
|
||||||
yield return 0xFF7FFFFFFF7FFFFFul; // -Max Normal (float.MinValue)
|
yield return 0xFF7FFFFFFF7FFFFFul; // -Max Normal (float.MinValue)
|
||||||
yield return 0x8080000080800000ul; // -Min Normal
|
yield return 0x8080000080800000ul; // -Min Normal
|
||||||
|
@ -304,11 +324,19 @@ namespace Ryujinx.Tests.Cpu
|
||||||
|
|
||||||
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
||||||
{
|
{
|
||||||
ulong rnd1 = GenNormalS();
|
ulong rnd1 = (uint)BitConverter.SingleToInt32Bits(
|
||||||
ulong rnd2 = GenSubnormalS();
|
(float)((int)TestContext.CurrentContext.Random.NextUInt()));
|
||||||
|
ulong rnd2 = (uint)BitConverter.SingleToInt32Bits(
|
||||||
|
(float)((uint)TestContext.CurrentContext.Random.NextUInt()));
|
||||||
|
|
||||||
|
ulong rnd3 = GenNormalS();
|
||||||
|
ulong rnd4 = GenSubnormalS();
|
||||||
|
|
||||||
yield return (rnd1 << 32) | rnd1;
|
yield return (rnd1 << 32) | rnd1;
|
||||||
yield return (rnd2 << 32) | rnd2;
|
yield return (rnd2 << 32) | rnd2;
|
||||||
|
|
||||||
|
yield return (rnd3 << 32) | rnd3;
|
||||||
|
yield return (rnd4 << 32) | rnd4;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -353,7 +381,7 @@ namespace Ryujinx.Tests.Cpu
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
private static IEnumerable<ulong> _1D_F_Cvt_()
|
private static IEnumerable<ulong> _1D_F_X_()
|
||||||
{
|
{
|
||||||
// long
|
// long
|
||||||
yield return 0xC3E0000000000001ul; // -9.2233720368547780E18d (-9223372036854778000)
|
yield return 0xC3E0000000000001ul; // -9.2233720368547780E18d (-9223372036854778000)
|
||||||
|
@ -363,6 +391,11 @@ namespace Ryujinx.Tests.Cpu
|
||||||
yield return 0x43E0000000000000ul; // 9.2233720368547760E18d (9223372036854776000)
|
yield return 0x43E0000000000000ul; // 9.2233720368547760E18d (9223372036854776000)
|
||||||
yield return 0x43DFFFFFFFFFFFFFul; // 9.2233720368547750E18d (9223372036854775000)
|
yield return 0x43DFFFFFFFFFFFFFul; // 9.2233720368547750E18d (9223372036854775000)
|
||||||
|
|
||||||
|
// ulong
|
||||||
|
yield return 0x43F0000000000001ul; // 1.8446744073709556e19d (18446744073709556000)
|
||||||
|
yield return 0x43F0000000000000ul; // 1.8446744073709552E19d (18446744073709552000)
|
||||||
|
yield return 0x43EFFFFFFFFFFFFFul; // 1.8446744073709550e19d (18446744073709550000)
|
||||||
|
|
||||||
yield return 0xFFEFFFFFFFFFFFFFul; // -Max Normal (double.MinValue)
|
yield return 0xFFEFFFFFFFFFFFFFul; // -Max Normal (double.MinValue)
|
||||||
yield return 0x8010000000000000ul; // -Min Normal
|
yield return 0x8010000000000000ul; // -Min Normal
|
||||||
yield return 0x800FFFFFFFFFFFFFul; // -Max Subnormal
|
yield return 0x800FFFFFFFFFFFFFul; // -Max Subnormal
|
||||||
|
@ -394,11 +427,19 @@ namespace Ryujinx.Tests.Cpu
|
||||||
|
|
||||||
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
||||||
{
|
{
|
||||||
ulong rnd1 = GenNormalD();
|
ulong rnd1 = (ulong)BitConverter.DoubleToInt64Bits(
|
||||||
ulong rnd2 = GenSubnormalD();
|
(double)((long)TestContext.CurrentContext.Random.NextULong()));
|
||||||
|
ulong rnd2 = (ulong)BitConverter.DoubleToInt64Bits(
|
||||||
|
(double)((ulong)TestContext.CurrentContext.Random.NextULong()));
|
||||||
|
|
||||||
|
ulong rnd3 = GenNormalD();
|
||||||
|
ulong rnd4 = GenSubnormalD();
|
||||||
|
|
||||||
yield return rnd1;
|
yield return rnd1;
|
||||||
yield return rnd2;
|
yield return rnd2;
|
||||||
|
|
||||||
|
yield return rnd3;
|
||||||
|
yield return rnd4;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
#endregion
|
#endregion
|
||||||
|
@ -1467,7 +1508,7 @@ namespace Ryujinx.Tests.Cpu
|
||||||
|
|
||||||
[Test, Pairwise] [Explicit]
|
[Test, Pairwise] [Explicit]
|
||||||
public void F_Cvt_NZ_SU_S_S([ValueSource("_F_Cvt_NZ_SU_S_S_")] uint opcodes,
|
public void F_Cvt_NZ_SU_S_S([ValueSource("_F_Cvt_NZ_SU_S_S_")] uint opcodes,
|
||||||
[ValueSource("_1S_F_Cvt_")] ulong a)
|
[ValueSource("_1S_F_W_")] ulong a)
|
||||||
{
|
{
|
||||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||||
Vector128<float> v0 = MakeVectorE0E1(z, z);
|
Vector128<float> v0 = MakeVectorE0E1(z, z);
|
||||||
|
@ -1480,7 +1521,7 @@ namespace Ryujinx.Tests.Cpu
|
||||||
|
|
||||||
[Test, Pairwise] [Explicit]
|
[Test, Pairwise] [Explicit]
|
||||||
public void F_Cvt_NZ_SU_S_D([ValueSource("_F_Cvt_NZ_SU_S_D_")] uint opcodes,
|
public void F_Cvt_NZ_SU_S_D([ValueSource("_F_Cvt_NZ_SU_S_D_")] uint opcodes,
|
||||||
[ValueSource("_1D_F_Cvt_")] ulong a)
|
[ValueSource("_1D_F_X_")] ulong a)
|
||||||
{
|
{
|
||||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||||
Vector128<float> v0 = MakeVectorE1(z);
|
Vector128<float> v0 = MakeVectorE1(z);
|
||||||
|
@ -1495,8 +1536,8 @@ namespace Ryujinx.Tests.Cpu
|
||||||
public void F_Cvt_NZ_SU_V_2S_4S([ValueSource("_F_Cvt_NZ_SU_V_2S_4S_")] uint opcodes,
|
public void F_Cvt_NZ_SU_V_2S_4S([ValueSource("_F_Cvt_NZ_SU_V_2S_4S_")] uint opcodes,
|
||||||
[Values(0u)] uint rd,
|
[Values(0u)] uint rd,
|
||||||
[Values(1u, 0u)] uint rn,
|
[Values(1u, 0u)] uint rn,
|
||||||
[ValueSource("_2S_F_Cvt_")] ulong z,
|
[ValueSource("_2S_F_W_")] ulong z,
|
||||||
[ValueSource("_2S_F_Cvt_")] ulong a,
|
[ValueSource("_2S_F_W_")] ulong a,
|
||||||
[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
|
[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||||
{
|
{
|
||||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||||
|
@ -1514,8 +1555,8 @@ namespace Ryujinx.Tests.Cpu
|
||||||
public void F_Cvt_NZ_SU_V_2D([ValueSource("_F_Cvt_NZ_SU_V_2D_")] uint opcodes,
|
public void F_Cvt_NZ_SU_V_2D([ValueSource("_F_Cvt_NZ_SU_V_2D_")] uint opcodes,
|
||||||
[Values(0u)] uint rd,
|
[Values(0u)] uint rd,
|
||||||
[Values(1u, 0u)] uint rn,
|
[Values(1u, 0u)] uint rn,
|
||||||
[ValueSource("_1D_F_Cvt_")] ulong z,
|
[ValueSource("_1D_F_X_")] ulong z,
|
||||||
[ValueSource("_1D_F_Cvt_")] ulong a)
|
[ValueSource("_1D_F_X_")] ulong a)
|
||||||
{
|
{
|
||||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||||
|
|
||||||
|
|
|
@ -2,6 +2,7 @@
|
||||||
|
|
||||||
using NUnit.Framework;
|
using NUnit.Framework;
|
||||||
|
|
||||||
|
using System;
|
||||||
using System.Collections.Generic;
|
using System.Collections.Generic;
|
||||||
using System.Runtime.Intrinsics;
|
using System.Runtime.Intrinsics;
|
||||||
|
|
||||||
|
@ -13,15 +14,15 @@ namespace Ryujinx.Tests.Cpu
|
||||||
#if SimdCvt
|
#if SimdCvt
|
||||||
|
|
||||||
#region "ValueSource (Types)"
|
#region "ValueSource (Types)"
|
||||||
private static IEnumerable<ulong> _1S_F_Cvt_()
|
private static IEnumerable<ulong> _1S_F_WX_()
|
||||||
{
|
{
|
||||||
// int
|
// int
|
||||||
yield return 0x00000000CF000001; // -2.1474839E9f (-2147483904)
|
yield return 0x00000000CF000001ul; // -2.1474839E9f (-2147483904)
|
||||||
yield return 0x00000000CF000000; // -2.14748365E9f (-2147483648)
|
yield return 0x00000000CF000000ul; // -2.14748365E9f (-2147483648)
|
||||||
yield return 0x00000000CEFFFFFF; // -2.14748352E9f (-2147483520)
|
yield return 0x00000000CEFFFFFFul; // -2.14748352E9f (-2147483520)
|
||||||
yield return 0x000000004F000001; // 2.1474839E9f (2147483904)
|
yield return 0x000000004F000001ul; // 2.1474839E9f (2147483904)
|
||||||
yield return 0x000000004F000000; // 2.14748365E9f (2147483648)
|
yield return 0x000000004F000000ul; // 2.14748365E9f (2147483648)
|
||||||
yield return 0x000000004EFFFFFF; // 2.14748352E9f (2147483520)
|
yield return 0x000000004EFFFFFFul; // 2.14748352E9f (2147483520)
|
||||||
|
|
||||||
// long
|
// long
|
||||||
yield return 0x00000000DF000001ul; // -9.223373E18f (-9223373136366403584)
|
yield return 0x00000000DF000001ul; // -9.223373E18f (-9223373136366403584)
|
||||||
|
@ -31,6 +32,16 @@ namespace Ryujinx.Tests.Cpu
|
||||||
yield return 0x000000005F000000ul; // 9.223372E18f (9223372036854775808)
|
yield return 0x000000005F000000ul; // 9.223372E18f (9223372036854775808)
|
||||||
yield return 0x000000005EFFFFFFul; // 9.2233715E18f (9223371487098961920)
|
yield return 0x000000005EFFFFFFul; // 9.2233715E18f (9223371487098961920)
|
||||||
|
|
||||||
|
// uint
|
||||||
|
yield return 0x000000004F800001ul; // 4.2949678E9f (4294967808)
|
||||||
|
yield return 0x000000004F800000ul; // 4.2949673E9f (4294967296)
|
||||||
|
yield return 0x000000004F7FFFFFul; // 4.29496704E9f (4294967040)
|
||||||
|
|
||||||
|
// ulong
|
||||||
|
yield return 0x000000005F800001ul; // 1.8446746E19f (18446746272732807168)
|
||||||
|
yield return 0x000000005F800000ul; // 1.8446744E19f (18446744073709551616)
|
||||||
|
yield return 0x000000005F7FFFFFul; // 1.8446743E19f (18446742974197923840)
|
||||||
|
|
||||||
yield return 0x00000000FF7FFFFFul; // -Max Normal (float.MinValue)
|
yield return 0x00000000FF7FFFFFul; // -Max Normal (float.MinValue)
|
||||||
yield return 0x0000000080800000ul; // -Min Normal
|
yield return 0x0000000080800000ul; // -Min Normal
|
||||||
yield return 0x00000000807FFFFFul; // -Max Subnormal
|
yield return 0x00000000807FFFFFul; // -Max Subnormal
|
||||||
|
@ -63,15 +74,30 @@ namespace Ryujinx.Tests.Cpu
|
||||||
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
||||||
{
|
{
|
||||||
ulong grbg = TestContext.CurrentContext.Random.NextUInt();
|
ulong grbg = TestContext.CurrentContext.Random.NextUInt();
|
||||||
ulong rnd1 = GenNormalS();
|
|
||||||
ulong rnd2 = GenSubnormalS();
|
ulong rnd1 = (uint)BitConverter.SingleToInt32Bits(
|
||||||
|
(float)((int)TestContext.CurrentContext.Random.NextUInt()));
|
||||||
|
ulong rnd2 = (uint)BitConverter.SingleToInt32Bits(
|
||||||
|
(float)((long)TestContext.CurrentContext.Random.NextULong()));
|
||||||
|
ulong rnd3 = (uint)BitConverter.SingleToInt32Bits(
|
||||||
|
(float)((uint)TestContext.CurrentContext.Random.NextUInt()));
|
||||||
|
ulong rnd4 = (uint)BitConverter.SingleToInt32Bits(
|
||||||
|
(float)((ulong)TestContext.CurrentContext.Random.NextULong()));
|
||||||
|
|
||||||
|
ulong rnd5 = GenNormalS();
|
||||||
|
ulong rnd6 = GenSubnormalS();
|
||||||
|
|
||||||
yield return (grbg << 32) | rnd1;
|
yield return (grbg << 32) | rnd1;
|
||||||
yield return (grbg << 32) | rnd2;
|
yield return (grbg << 32) | rnd2;
|
||||||
|
yield return (grbg << 32) | rnd3;
|
||||||
|
yield return (grbg << 32) | rnd4;
|
||||||
|
|
||||||
|
yield return (grbg << 32) | rnd5;
|
||||||
|
yield return (grbg << 32) | rnd6;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
private static IEnumerable<ulong> _1D_F_Cvt_()
|
private static IEnumerable<ulong> _1D_F_WX_()
|
||||||
{
|
{
|
||||||
// int
|
// int
|
||||||
yield return 0xC1E0000000200000ul; // -2147483649.0000000d (-2147483649)
|
yield return 0xC1E0000000200000ul; // -2147483649.0000000d (-2147483649)
|
||||||
|
@ -89,6 +115,16 @@ namespace Ryujinx.Tests.Cpu
|
||||||
yield return 0x43E0000000000000ul; // 9.2233720368547760E18d (9223372036854776000)
|
yield return 0x43E0000000000000ul; // 9.2233720368547760E18d (9223372036854776000)
|
||||||
yield return 0x43DFFFFFFFFFFFFFul; // 9.2233720368547750E18d (9223372036854775000)
|
yield return 0x43DFFFFFFFFFFFFFul; // 9.2233720368547750E18d (9223372036854775000)
|
||||||
|
|
||||||
|
// uint
|
||||||
|
yield return 0x41F0000000100000ul; // 4294967297.0000000d (4294967297)
|
||||||
|
yield return 0x41F0000000000000ul; // 4294967296.0000000d (4294967296)
|
||||||
|
yield return 0x41EFFFFFFFE00000ul; // 4294967295.0000000d (4294967295)
|
||||||
|
|
||||||
|
// ulong
|
||||||
|
yield return 0x43F0000000000001ul; // 1.8446744073709556e19d (18446744073709556000)
|
||||||
|
yield return 0x43F0000000000000ul; // 1.8446744073709552E19d (18446744073709552000)
|
||||||
|
yield return 0x43EFFFFFFFFFFFFFul; // 1.8446744073709550e19d (18446744073709550000)
|
||||||
|
|
||||||
yield return 0xFFEFFFFFFFFFFFFFul; // -Max Normal (double.MinValue)
|
yield return 0xFFEFFFFFFFFFFFFFul; // -Max Normal (double.MinValue)
|
||||||
yield return 0x8010000000000000ul; // -Min Normal
|
yield return 0x8010000000000000ul; // -Min Normal
|
||||||
yield return 0x800FFFFFFFFFFFFFul; // -Max Subnormal
|
yield return 0x800FFFFFFFFFFFFFul; // -Max Subnormal
|
||||||
|
@ -120,11 +156,25 @@ namespace Ryujinx.Tests.Cpu
|
||||||
|
|
||||||
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
||||||
{
|
{
|
||||||
ulong rnd1 = GenNormalD();
|
ulong rnd1 = (ulong)BitConverter.DoubleToInt64Bits(
|
||||||
ulong rnd2 = GenSubnormalD();
|
(double)((int)TestContext.CurrentContext.Random.NextUInt()));
|
||||||
|
ulong rnd2 = (ulong)BitConverter.DoubleToInt64Bits(
|
||||||
|
(double)((long)TestContext.CurrentContext.Random.NextULong()));
|
||||||
|
ulong rnd3 = (ulong)BitConverter.DoubleToInt64Bits(
|
||||||
|
(double)((uint)TestContext.CurrentContext.Random.NextUInt()));
|
||||||
|
ulong rnd4 = (ulong)BitConverter.DoubleToInt64Bits(
|
||||||
|
(double)((ulong)TestContext.CurrentContext.Random.NextULong()));
|
||||||
|
|
||||||
|
ulong rnd5 = GenNormalD();
|
||||||
|
ulong rnd6 = GenSubnormalD();
|
||||||
|
|
||||||
yield return rnd1;
|
yield return rnd1;
|
||||||
yield return rnd2;
|
yield return rnd2;
|
||||||
|
yield return rnd3;
|
||||||
|
yield return rnd4;
|
||||||
|
|
||||||
|
yield return rnd5;
|
||||||
|
yield return rnd6;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -286,7 +336,7 @@ namespace Ryujinx.Tests.Cpu
|
||||||
public void F_Cvt_AMPZ_SU_Gp_SW([ValueSource("_F_Cvt_AMPZ_SU_Gp_SW_")] uint opcodes,
|
public void F_Cvt_AMPZ_SU_Gp_SW([ValueSource("_F_Cvt_AMPZ_SU_Gp_SW_")] uint opcodes,
|
||||||
[Values(0u, 31u)] uint rd,
|
[Values(0u, 31u)] uint rd,
|
||||||
[Values(1u)] uint rn,
|
[Values(1u)] uint rn,
|
||||||
[ValueSource("_1S_F_Cvt_")] ulong a)
|
[ValueSource("_1S_F_WX_")] ulong a)
|
||||||
{
|
{
|
||||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||||
|
|
||||||
|
@ -303,7 +353,7 @@ namespace Ryujinx.Tests.Cpu
|
||||||
public void F_Cvt_AMPZ_SU_Gp_SX([ValueSource("_F_Cvt_AMPZ_SU_Gp_SX_")] uint opcodes,
|
public void F_Cvt_AMPZ_SU_Gp_SX([ValueSource("_F_Cvt_AMPZ_SU_Gp_SX_")] uint opcodes,
|
||||||
[Values(0u, 31u)] uint rd,
|
[Values(0u, 31u)] uint rd,
|
||||||
[Values(1u)] uint rn,
|
[Values(1u)] uint rn,
|
||||||
[ValueSource("_1S_F_Cvt_")] ulong a)
|
[ValueSource("_1S_F_WX_")] ulong a)
|
||||||
{
|
{
|
||||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||||
|
|
||||||
|
@ -319,7 +369,7 @@ namespace Ryujinx.Tests.Cpu
|
||||||
public void F_Cvt_AMPZ_SU_Gp_DW([ValueSource("_F_Cvt_AMPZ_SU_Gp_DW_")] uint opcodes,
|
public void F_Cvt_AMPZ_SU_Gp_DW([ValueSource("_F_Cvt_AMPZ_SU_Gp_DW_")] uint opcodes,
|
||||||
[Values(0u, 31u)] uint rd,
|
[Values(0u, 31u)] uint rd,
|
||||||
[Values(1u)] uint rn,
|
[Values(1u)] uint rn,
|
||||||
[ValueSource("_1D_F_Cvt_")] ulong a)
|
[ValueSource("_1D_F_WX_")] ulong a)
|
||||||
{
|
{
|
||||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||||
|
|
||||||
|
@ -336,7 +386,7 @@ namespace Ryujinx.Tests.Cpu
|
||||||
public void F_Cvt_AMPZ_SU_Gp_DX([ValueSource("_F_Cvt_AMPZ_SU_Gp_DX_")] uint opcodes,
|
public void F_Cvt_AMPZ_SU_Gp_DX([ValueSource("_F_Cvt_AMPZ_SU_Gp_DX_")] uint opcodes,
|
||||||
[Values(0u, 31u)] uint rd,
|
[Values(0u, 31u)] uint rd,
|
||||||
[Values(1u)] uint rn,
|
[Values(1u)] uint rn,
|
||||||
[ValueSource("_1D_F_Cvt_")] ulong a)
|
[ValueSource("_1D_F_WX_")] ulong a)
|
||||||
{
|
{
|
||||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||||
|
|
||||||
|
@ -352,7 +402,7 @@ namespace Ryujinx.Tests.Cpu
|
||||||
public void F_Cvt_Z_SU_Gp_Fixed_SW([ValueSource("_F_Cvt_Z_SU_Gp_Fixed_SW_")] uint opcodes,
|
public void F_Cvt_Z_SU_Gp_Fixed_SW([ValueSource("_F_Cvt_Z_SU_Gp_Fixed_SW_")] uint opcodes,
|
||||||
[Values(0u, 31u)] uint rd,
|
[Values(0u, 31u)] uint rd,
|
||||||
[Values(1u)] uint rn,
|
[Values(1u)] uint rn,
|
||||||
[ValueSource("_1S_F_Cvt_")] ulong a,
|
[ValueSource("_1S_F_WX_")] ulong a,
|
||||||
[Values(1u, 32u)] [Random(2u, 31u, RndCntFBits)] uint fBits)
|
[Values(1u, 32u)] [Random(2u, 31u, RndCntFBits)] uint fBits)
|
||||||
{
|
{
|
||||||
uint scale = (64u - fBits) & 0x3Fu;
|
uint scale = (64u - fBits) & 0x3Fu;
|
||||||
|
@ -373,7 +423,7 @@ namespace Ryujinx.Tests.Cpu
|
||||||
public void F_Cvt_Z_SU_Gp_Fixed_SX([ValueSource("_F_Cvt_Z_SU_Gp_Fixed_SX_")] uint opcodes,
|
public void F_Cvt_Z_SU_Gp_Fixed_SX([ValueSource("_F_Cvt_Z_SU_Gp_Fixed_SX_")] uint opcodes,
|
||||||
[Values(0u, 31u)] uint rd,
|
[Values(0u, 31u)] uint rd,
|
||||||
[Values(1u)] uint rn,
|
[Values(1u)] uint rn,
|
||||||
[ValueSource("_1S_F_Cvt_")] ulong a,
|
[ValueSource("_1S_F_WX_")] ulong a,
|
||||||
[Values(1u, 64u)] [Random(2u, 63u, RndCntFBits)] uint fBits)
|
[Values(1u, 64u)] [Random(2u, 63u, RndCntFBits)] uint fBits)
|
||||||
{
|
{
|
||||||
uint scale = (64u - fBits) & 0x3Fu;
|
uint scale = (64u - fBits) & 0x3Fu;
|
||||||
|
@ -393,7 +443,7 @@ namespace Ryujinx.Tests.Cpu
|
||||||
public void F_Cvt_Z_SU_Gp_Fixed_DW([ValueSource("_F_Cvt_Z_SU_Gp_Fixed_DW_")] uint opcodes,
|
public void F_Cvt_Z_SU_Gp_Fixed_DW([ValueSource("_F_Cvt_Z_SU_Gp_Fixed_DW_")] uint opcodes,
|
||||||
[Values(0u, 31u)] uint rd,
|
[Values(0u, 31u)] uint rd,
|
||||||
[Values(1u)] uint rn,
|
[Values(1u)] uint rn,
|
||||||
[ValueSource("_1D_F_Cvt_")] ulong a,
|
[ValueSource("_1D_F_WX_")] ulong a,
|
||||||
[Values(1u, 32u)] [Random(2u, 31u, RndCntFBits)] uint fBits)
|
[Values(1u, 32u)] [Random(2u, 31u, RndCntFBits)] uint fBits)
|
||||||
{
|
{
|
||||||
uint scale = (64u - fBits) & 0x3Fu;
|
uint scale = (64u - fBits) & 0x3Fu;
|
||||||
|
@ -414,7 +464,7 @@ namespace Ryujinx.Tests.Cpu
|
||||||
public void F_Cvt_Z_SU_Gp_Fixed_DX([ValueSource("_F_Cvt_Z_SU_Gp_Fixed_DX_")] uint opcodes,
|
public void F_Cvt_Z_SU_Gp_Fixed_DX([ValueSource("_F_Cvt_Z_SU_Gp_Fixed_DX_")] uint opcodes,
|
||||||
[Values(0u, 31u)] uint rd,
|
[Values(0u, 31u)] uint rd,
|
||||||
[Values(1u)] uint rn,
|
[Values(1u)] uint rn,
|
||||||
[ValueSource("_1D_F_Cvt_")] ulong a,
|
[ValueSource("_1D_F_WX_")] ulong a,
|
||||||
[Values(1u, 64u)] [Random(2u, 63u, RndCntFBits)] uint fBits)
|
[Values(1u, 64u)] [Random(2u, 63u, RndCntFBits)] uint fBits)
|
||||||
{
|
{
|
||||||
uint scale = (64u - fBits) & 0x3Fu;
|
uint scale = (64u - fBits) & 0x3Fu;
|
||||||
|
|
|
@ -2,6 +2,7 @@
|
||||||
|
|
||||||
using NUnit.Framework;
|
using NUnit.Framework;
|
||||||
|
|
||||||
|
using System;
|
||||||
using System.Collections.Generic;
|
using System.Collections.Generic;
|
||||||
using System.Runtime.Intrinsics;
|
using System.Runtime.Intrinsics;
|
||||||
|
|
||||||
|
@ -49,15 +50,20 @@ namespace Ryujinx.Tests.Cpu
|
||||||
0x8080808080808080ul, 0xFFFFFFFFFFFFFFFFul };
|
0x8080808080808080ul, 0xFFFFFFFFFFFFFFFFul };
|
||||||
}
|
}
|
||||||
|
|
||||||
private static IEnumerable<ulong> _2S_F_Cvt_()
|
private static IEnumerable<ulong> _2S_F_W_()
|
||||||
{
|
{
|
||||||
// int
|
// int
|
||||||
yield return 0xCF000001CF000001; // -2.1474839E9f (-2147483904)
|
yield return 0xCF000001CF000001ul; // -2.1474839E9f (-2147483904)
|
||||||
yield return 0xCF000000CF000000; // -2.14748365E9f (-2147483648)
|
yield return 0xCF000000CF000000ul; // -2.14748365E9f (-2147483648)
|
||||||
yield return 0xCEFFFFFFCEFFFFFF; // -2.14748352E9f (-2147483520)
|
yield return 0xCEFFFFFFCEFFFFFFul; // -2.14748352E9f (-2147483520)
|
||||||
yield return 0x4F0000014F000001; // 2.1474839E9f (2147483904)
|
yield return 0x4F0000014F000001ul; // 2.1474839E9f (2147483904)
|
||||||
yield return 0x4F0000004F000000; // 2.14748365E9f (2147483648)
|
yield return 0x4F0000004F000000ul; // 2.14748365E9f (2147483648)
|
||||||
yield return 0x4EFFFFFF4EFFFFFF; // 2.14748352E9f (2147483520)
|
yield return 0x4EFFFFFF4EFFFFFFul; // 2.14748352E9f (2147483520)
|
||||||
|
|
||||||
|
// uint
|
||||||
|
yield return 0x4F8000014F800001ul; // 4.2949678E9f (4294967808)
|
||||||
|
yield return 0x4F8000004F800000ul; // 4.2949673E9f (4294967296)
|
||||||
|
yield return 0x4F7FFFFF4F7FFFFFul; // 4.29496704E9f (4294967040)
|
||||||
|
|
||||||
yield return 0xFF7FFFFFFF7FFFFFul; // -Max Normal (float.MinValue)
|
yield return 0xFF7FFFFFFF7FFFFFul; // -Max Normal (float.MinValue)
|
||||||
yield return 0x8080000080800000ul; // -Min Normal
|
yield return 0x8080000080800000ul; // -Min Normal
|
||||||
|
@ -90,15 +96,23 @@ namespace Ryujinx.Tests.Cpu
|
||||||
|
|
||||||
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
||||||
{
|
{
|
||||||
ulong rnd1 = GenNormalS();
|
ulong rnd1 = (uint)BitConverter.SingleToInt32Bits(
|
||||||
ulong rnd2 = GenSubnormalS();
|
(float)((int)TestContext.CurrentContext.Random.NextUInt()));
|
||||||
|
ulong rnd2 = (uint)BitConverter.SingleToInt32Bits(
|
||||||
|
(float)((uint)TestContext.CurrentContext.Random.NextUInt()));
|
||||||
|
|
||||||
|
ulong rnd3 = GenNormalS();
|
||||||
|
ulong rnd4 = GenSubnormalS();
|
||||||
|
|
||||||
yield return (rnd1 << 32) | rnd1;
|
yield return (rnd1 << 32) | rnd1;
|
||||||
yield return (rnd2 << 32) | rnd2;
|
yield return (rnd2 << 32) | rnd2;
|
||||||
|
|
||||||
|
yield return (rnd3 << 32) | rnd3;
|
||||||
|
yield return (rnd4 << 32) | rnd4;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
private static IEnumerable<ulong> _1D_F_Cvt_()
|
private static IEnumerable<ulong> _1D_F_X_()
|
||||||
{
|
{
|
||||||
// long
|
// long
|
||||||
yield return 0xC3E0000000000001ul; // -9.2233720368547780E18d (-9223372036854778000)
|
yield return 0xC3E0000000000001ul; // -9.2233720368547780E18d (-9223372036854778000)
|
||||||
|
@ -108,6 +122,11 @@ namespace Ryujinx.Tests.Cpu
|
||||||
yield return 0x43E0000000000000ul; // 9.2233720368547760E18d (9223372036854776000)
|
yield return 0x43E0000000000000ul; // 9.2233720368547760E18d (9223372036854776000)
|
||||||
yield return 0x43DFFFFFFFFFFFFFul; // 9.2233720368547750E18d (9223372036854775000)
|
yield return 0x43DFFFFFFFFFFFFFul; // 9.2233720368547750E18d (9223372036854775000)
|
||||||
|
|
||||||
|
// ulong
|
||||||
|
yield return 0x43F0000000000001ul; // 1.8446744073709556e19d (18446744073709556000)
|
||||||
|
yield return 0x43F0000000000000ul; // 1.8446744073709552E19d (18446744073709552000)
|
||||||
|
yield return 0x43EFFFFFFFFFFFFFul; // 1.8446744073709550e19d (18446744073709550000)
|
||||||
|
|
||||||
yield return 0xFFEFFFFFFFFFFFFFul; // -Max Normal (double.MinValue)
|
yield return 0xFFEFFFFFFFFFFFFFul; // -Max Normal (double.MinValue)
|
||||||
yield return 0x8010000000000000ul; // -Min Normal
|
yield return 0x8010000000000000ul; // -Min Normal
|
||||||
yield return 0x800FFFFFFFFFFFFFul; // -Max Subnormal
|
yield return 0x800FFFFFFFFFFFFFul; // -Max Subnormal
|
||||||
|
@ -139,11 +158,19 @@ namespace Ryujinx.Tests.Cpu
|
||||||
|
|
||||||
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
for (int cnt = 1; cnt <= RndCnt; cnt++)
|
||||||
{
|
{
|
||||||
ulong rnd1 = GenNormalD();
|
ulong rnd1 = (ulong)BitConverter.DoubleToInt64Bits(
|
||||||
ulong rnd2 = GenSubnormalD();
|
(double)((long)TestContext.CurrentContext.Random.NextULong()));
|
||||||
|
ulong rnd2 = (ulong)BitConverter.DoubleToInt64Bits(
|
||||||
|
(double)((ulong)TestContext.CurrentContext.Random.NextULong()));
|
||||||
|
|
||||||
|
ulong rnd3 = GenNormalD();
|
||||||
|
ulong rnd4 = GenSubnormalD();
|
||||||
|
|
||||||
yield return rnd1;
|
yield return rnd1;
|
||||||
yield return rnd2;
|
yield return rnd2;
|
||||||
|
|
||||||
|
yield return rnd3;
|
||||||
|
yield return rnd4;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
#endregion
|
#endregion
|
||||||
|
@ -387,8 +414,8 @@ namespace Ryujinx.Tests.Cpu
|
||||||
public void F_Cvt_Z_SU_V_Fixed_2S_4S([ValueSource("_F_Cvt_Z_SU_V_Fixed_2S_4S_")] uint opcodes,
|
public void F_Cvt_Z_SU_V_Fixed_2S_4S([ValueSource("_F_Cvt_Z_SU_V_Fixed_2S_4S_")] uint opcodes,
|
||||||
[Values(0u)] uint rd,
|
[Values(0u)] uint rd,
|
||||||
[Values(1u, 0u)] uint rn,
|
[Values(1u, 0u)] uint rn,
|
||||||
[ValueSource("_2S_F_Cvt_")] ulong z,
|
[ValueSource("_2S_F_W_")] ulong z,
|
||||||
[ValueSource("_2S_F_Cvt_")] ulong a,
|
[ValueSource("_2S_F_W_")] ulong a,
|
||||||
[Values(1u, 32u)] [Random(2u, 31u, RndCntFBits)] uint fBits,
|
[Values(1u, 32u)] [Random(2u, 31u, RndCntFBits)] uint fBits,
|
||||||
[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
|
[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||||
{
|
{
|
||||||
|
@ -410,8 +437,8 @@ namespace Ryujinx.Tests.Cpu
|
||||||
public void F_Cvt_Z_SU_V_Fixed_2D([ValueSource("_F_Cvt_Z_SU_V_Fixed_2D_")] uint opcodes,
|
public void F_Cvt_Z_SU_V_Fixed_2D([ValueSource("_F_Cvt_Z_SU_V_Fixed_2D_")] uint opcodes,
|
||||||
[Values(0u)] uint rd,
|
[Values(0u)] uint rd,
|
||||||
[Values(1u, 0u)] uint rn,
|
[Values(1u, 0u)] uint rn,
|
||||||
[ValueSource("_1D_F_Cvt_")] ulong z,
|
[ValueSource("_1D_F_X_")] ulong z,
|
||||||
[ValueSource("_1D_F_Cvt_")] ulong a,
|
[ValueSource("_1D_F_X_")] ulong a,
|
||||||
[Values(1u, 64u)] [Random(2u, 63u, RndCntFBits)] uint fBits)
|
[Values(1u, 64u)] [Random(2u, 63u, RndCntFBits)] uint fBits)
|
||||||
{
|
{
|
||||||
uint immHb = (128 - fBits) & 0x7F;
|
uint immHb = (128 - fBits) & 0x7F;
|
||||||
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Reference in a new issue