emu-mirrors/ryujinx-final
Archived
0
0
Fork 0
Code Activity

SIMD&FP load/store with scale > 4 should be undefined (#1522)

Browse source 
* SIMD&FP load/store with scale > 4 should be undefined

* Catch more invalid encodings for FP&SIMD LDR/STR (reg variant)

* Set PTC version to PR number
This commit is contained in:
gdkchan 2020-09-01 17:02:23 -03:00 committed by GitHub
parent 3d294a9a6c
commit 6cc187da59
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
4 changed files with 20 additions and 4 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

11
ARMeilleure/Decoders/OpCodeSimdMemImm.cs
View file

@ -6,7 +6,16 @@ namespace ARMeilleure.Decoders
{
Size |= (opCode >> 21) & 4;
if (!WBack && !Unscaled && Size >= 4)
if (Size > 4)
{
Instruction = InstDescriptor.Undefined;
return;
}
// Base class already shifts the immediate, we only
// need to shift it if size (scale) is 4, since this value is only set here.
if (!WBack && !Unscaled && Size == 4)
{
Immediate <<= 4;
}

7
ARMeilleure/Decoders/OpCodeSimdMemReg.cs
View file

@ -6,6 +6,13 @@ namespace ARMeilleure.Decoders
{
Size |= (opCode >> 21) & 4;
if (Size > 4)
{
Instruction = InstDescriptor.Undefined;
return;
}
Extend64 = false;
}
}

4
ARMeilleure/Decoders/OpCodeTable.cs
View file

@ -412,7 +412,7 @@ namespace ARMeilleure.Decoders
SetA64("xx111100x10xxxxxxxxx01xxxxxxxxxx", InstName.Ldr, InstEmit.Ldr, typeof(OpCodeSimdMemImm));
SetA64("xx111100x10xxxxxxxxx11xxxxxxxxxx", InstName.Ldr, InstEmit.Ldr, typeof(OpCodeSimdMemImm));
SetA64("xx111101x1xxxxxxxxxxxxxxxxxxxxxx", InstName.Ldr, InstEmit.Ldr, typeof(OpCodeSimdMemImm));
SetA64("xx111100x11xxxxxxxxx10xxxxxxxxxx", InstName.Ldr, InstEmit.Ldr, typeof(OpCodeSimdMemReg));
SetA64("xx111100x11xxxxxx1xx10xxxxxxxxxx", InstName.Ldr, InstEmit.Ldr, typeof(OpCodeSimdMemReg));
SetA64("xx011100xxxxxxxxxxxxxxxxxxxxxxxx", InstName.Ldr_Literal, InstEmit.Ldr_Literal, typeof(OpCodeSimdMemLit));
SetA64("0x001110<<1xxxxx100101xxxxxxxxxx", InstName.Mla_V, InstEmit.Mla_V, typeof(OpCodeSimdReg));
SetA64("0x101111xxxxxxxx0000x0xxxxxxxxxx", InstName.Mla_Ve, InstEmit.Mla_Ve, typeof(OpCodeSimdRegElem));
@ -554,7 +554,7 @@ namespace ARMeilleure.Decoders
SetA64("xx111100x00xxxxxxxxx01xxxxxxxxxx", InstName.Str, InstEmit.Str, typeof(OpCodeSimdMemImm));
SetA64("xx111100x00xxxxxxxxx11xxxxxxxxxx", InstName.Str, InstEmit.Str, typeof(OpCodeSimdMemImm));
SetA64("xx111101x0xxxxxxxxxxxxxxxxxxxxxx", InstName.Str, InstEmit.Str, typeof(OpCodeSimdMemImm));
SetA64("xx111100x01xxxxxxxxx10xxxxxxxxxx", InstName.Str, InstEmit.Str, typeof(OpCodeSimdMemReg));
SetA64("xx111100x01xxxxxx1xx10xxxxxxxxxx", InstName.Str, InstEmit.Str, typeof(OpCodeSimdMemReg));
SetA64("01111110111xxxxx100001xxxxxxxxxx", InstName.Sub_S, InstEmit.Sub_S, typeof(OpCodeSimdReg));
SetA64("0>101110<<1xxxxx100001xxxxxxxxxx", InstName.Sub_V, InstEmit.Sub_V, typeof(OpCodeSimdReg));
SetA64("0x001110<<1xxxxx011000xxxxxxxxxx", InstName.Subhn_V, InstEmit.Subhn_V, typeof(OpCodeSimdReg));

2
ARMeilleure/Translation/PTC/Ptc.cs
View file

@ -21,7 +21,7 @@ namespace ARMeilleure.Translation.PTC
{
private const string HeaderMagic = "PTChd";
private const int InternalVersion = 1484; //! To be incremented manually for each change to the ARMeilleure project.
private const int InternalVersion = 1522; //! To be incremented manually for each change to the ARMeilleure project.
private const string ActualDir = "0";
private const string BackupDir = "1";