LDj3SNuD
74da8785a5
Sse optimized the 32-bit Vector & Scalar integer-to-fp conversion instructions (signed & unsigned); added the related Gp & V_Fixed Tests (signed & unsigned). ( #662 )
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* Update CpuTestSimdCvt.cs
* Update CpuTestSimd.cs
* Update CpuTestSimdShImm.cs
* Update InstEmitSimdCvt.cs
* Update OpCodeTable.cs
* Update InstEmitSimdCvt.cs
2019-04-20 23:07:35 -03:00
LDj3SNuD
233fc95e1e
Sse optimized the Vector & Scalar fp-to-integer conversion instructions (unsigned); improved the related Tests. ( #656 )
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* Update InstEmitSimdCvt.cs
* Update CpuTestSimdCvt.cs
* Update CpuTestSimd.cs
* Update CpuTestSimdShImm.cs
* Update InstEmitSimdCvt.cs
2019-04-12 13:14:16 -03:00
LDj3SNuD
febc2ad6f4
Sse optimized all the fp to integer conversion instructions (signed) with Tests (signed & unsigned). ( #655 )
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* Update CpuTestSimdCvt.cs
* Update CpuTestSimd.cs
* Update CpuTestSimdShImm.cs
* Update InstEmitSimdCvt.cs
* Update InstEmitSimdMove.cs
* Update InstEmitSimdCmp.cs
* Update VectorHelper.cs
* Update InstEmitSimdHelper.cs
* Update OpCodeTable.cs
* Update InstEmitSimdCvt.cs
* Update InstEmitSimdHelper.cs
* Update InstEmitSimdMove.cs
2019-04-03 09:21:22 -03:00
LDj3SNuD
1bef70c068
Add Rshrn_V & Shrn_V Sse opt.. Add Mla_V, Mls_V & Mul_V Sse opt.; add Tests. ( #614 )
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* Update CountLeadingZeros().
* Remove obsolete Tests.
* Follow-up.
* Follow-up.
* Follow-up.
* Add Mla_V, Mls_V & Mul_V Tests.
* Update PackageReferences.
* Remove EmitLd/Stvectmp2().
* Remove Dup. Nits.
* Remove EmitLd/Stvectmp2() & Dup; nits.
* Remove Tmp stuff & Dup; rework Fcvtz() as Fcvtn().
* Remove Tmp stuff, EmitLd/Stvectmp2() & Dup. Nits.
* Add (R)shrn_V Sse opt.; add "Part" & "Shift" opt..
Remove Tmp stuff; remove Dup.
Nits.
* Add Mla/Mls/Mul_V Sse opt.. Add "Part" opt..
Remove EmitLd/Stvectmp2(), remove Dup.
Nits.
* Nits.
* Nits.
* Nit.
* Add "Part" opt.. Nit.
* Nit.
* Nit.
* Add Cmhi_V & Cmhs_V Sse opt..
2019-03-13 19:23:52 +11:00
gdkchan
504f4f4abf
Remove all the calls to StaticCast methods ( #605 )
2019-02-26 10:46:34 +11:00
gdkchan
9679896b94
Implement fixed-point variant of the UCVTF and SCVTF instructions ( #578 )
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* Add fixed-point variant of the UCVTF instruction
* Change encoding of some fixed-point instructions to not allow invalid encodings
* Fix Fcvtzu_Gp_Fixed encoding
* Add SCVTF (fixed-point GP to Scalar) instruction
* Simplify *Fixed encodings
2019-02-23 20:52:48 -03:00
LDj3SNuD
8f7fcede7f
Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. ( #566 )
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* Update OpCodeTable.cs
* Update InstEmitSimdArithmetic.cs
* Update InstEmitSimdHelper.cs
* Update CpuTestSimdRegElem.cs
* Update InstEmitSimdMove.cs
* Update InstEmitSimdCvt.cs
* Update SoftFallback.cs
* Update InstEmitSimdHelper.cs
* Update SoftFloat.cs
* Update CryptoHelper.cs
* Update InstEmitSimdArithmetic.cs
* Update InstEmitSimdCmp.cs
* Address PR feedback.
* Address PR feedback.
2019-01-29 10:54:39 -03:00
gdkchan
36e8e074c9
Misc. CPU improvements ( #519 )
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* Fix and simplify TranslatorCache
* Fix some assignment alignments, remove some unused usings
* Changes to ILEmitter, separate it from ILEmitterCtx
* Rename ILEmitter to ILMethodBuilder
* Rename LdrLit and *_Fix opcodes
* Revert TranslatorCache impl to the more performant one, fix a few issues with it
* Allow EmitOpCode to be called even after everything has been emitted
* Make Emit and AdvanceOpCode private, simplify it a bit now that it starts emiting from the entry point
* Remove unneeded temp use
* Add missing exit call on TestExclusive
* Use better hash
* Implement the == and != operators
2018-12-10 22:58:52 -02:00
LDj3SNuD
e603b7afbc
Add Sse Opt. for S/Umax_V, S/Umin_V, S/Uaddw_V, S/Usubw_V, Fabs_S/V, Fneg_S/V Inst.; for Fcvtl_V, Fcvtn_V Inst.; and for Fcmp_S Inst.. Add/Improve other Sse Opt.. Add Tests. ( #496 )
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* Update CpuTest.cs
* Update CpuTestSimd.cs
* Update CpuTestSimdReg.cs
* Update InstEmitSimdCmp.cs
* Update SoftFloat.cs
* Update InstEmitAluHelper.cs
* Update InstEmitSimdArithmetic.cs
* Update InstEmitSimdHelper.cs
* Update VectorHelper.cs
* Update InstEmitSimdCvt.cs
* Update InstEmitSimdArithmetic.cs
* Update CpuTestSimd.cs
* Update InstEmitSimdArithmetic.cs
* Update OpCodeTable.cs
* Update InstEmitSimdArithmetic.cs
* Update InstEmitSimdCmp.cs
* Update InstEmitSimdCvt.cs
* Update CpuTestSimd.cs
* Update CpuTestSimdReg.cs
* Create CpuTestSimdFcond.cs
* Update OpCodeTable.cs
* Update InstEmitSimdMove.cs
* Update CpuTestSimdIns.cs
* Create CpuTestSimdExt.cs
* Nit.
* Update PackageReference.
2018-11-18 00:41:16 -02:00
LDj3SNuD
1e7ea76f14
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. ( #489 )
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* Update SoftFloat.cs
* Update SoftFallback.cs
* Update InstEmitSimdShift.cs
* Update InstEmitSimdCvt.cs
* Update InstEmitSimdArithmetic.cs
* Update CryptoHelper.cs
* Update CpuTestSimd.cs
* Update CpuTestSimdReg.cs
* Update CpuThreadState.cs
* Update OpCodeTable.cs
* Add files via upload
* Nit.
* Remove unused using. Nit.
* Remove unused using. FZ update.
* Nit.
* Remove unused using.
2018-11-01 01:22:09 -03:00
Alex Barney
9cb57fb4bb
Adjust naming conventions for Ryujinx and ChocolArm64 projects ( #484 )
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* Change naming convention for Ryujinx project
* Change naming convention for ChocolArm64 project
* Fix NaN
* Remove unneeded this. from Ryujinx project
* Adjust naming from new PRs
* Name changes based on feedback
* How did this get removed?
* Rebasing fix
* Change FP enum case
* Remove prefix from ChocolArm64 classes - Part 1
* Remove prefix from ChocolArm64 classes - Part 2
* Fix alignment from last commit's renaming
* Rename namespaces
* Rename stragglers
* Fix alignment
* Rename OpCode class
* Missed a few
* Adjust alignment
2018-10-30 22:43:02 -03:00
