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11 commits

Author SHA1 Message Date
gdkchan
770cb4b655 Somewhat better scheduler I guess 2018-02-19 16:37:13 -03:00
gdkchan
f35d286c8d Rename ARegisters to AThreadState 2018-02-18 16:28:07 -03:00
gdkchan
1c44d9f66d Fix for some SIMD issues 2018-02-18 01:57:33 -03:00
gdkchan
161193e113 CPU refactoring - move SIMD (scalar and vector) instructions to separate files by category, remove AILConv and use only the methods inside SIMD helper to extract/insert vector elements 2018-02-17 18:06:11 -03:00
gdkchan
f68696dc4a Made initial implementation of the thread scheduler, refactor Svc to avoid passing many arguments 2018-02-13 23:43:08 -03:00
gdkchan
7f4a190665 Fixes to memory management 2018-02-09 21:13:18 -03:00
gdkchan
ccc9ce1908 Move a few more SIMD instructions to emit CIL directly instead of a method call 2018-02-09 17:14:47 -03:00
gdkchan
6a3aa6cd88 Add FVCTZS (fixed point variant) and LD1 (single structure variant) instructions 2018-02-09 00:26:20 -03:00
gdkchan
18ac1c4045 Removed parts of the MMU functionality to use memory directly (faster, but potentially more dangerous, WIP), also changed the Shl/Sshr immediate instructions to use IL instead of calling the method 2018-02-07 13:44:48 -03:00
gdkchan
2347c44bbf Improve access to system registers by using properties, also use exclusive region granularity on exclusive load/stores, and ensure that acquires without releases won't hold the address forever, remove unused ALU rev method 2018-02-06 12:15:08 -03:00
gdkchan
b7e1d9930d aloha 2018-02-04 20:08:20 -03:00