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15 commits

Author SHA1 Message Date
LDj3SNuD
d87c5375f1 Implement a custom value generator for the Tests of the CLS and CLZ instructions (Base: 32, 64 bits. Simd: 8, 16, 32 bits). (#696) 
* Update CpuTestAlu.cs

* Update CpuTestSimd.cs

* Update CpuTestMov.cs
 2019-06-12 09:03:31 -03:00
LDj3SNuD
1e7ea76f14 Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489) 
* Update SoftFloat.cs

* Update SoftFallback.cs

* Update InstEmitSimdShift.cs

* Update InstEmitSimdCvt.cs

* Update InstEmitSimdArithmetic.cs

* Update CryptoHelper.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdReg.cs

* Update CpuThreadState.cs

* Update OpCodeTable.cs

* Add files via upload

* Nit.

* Remove unused using. Nit.

* Remove unused using. FZ update.

* Nit.

* Remove unused using.
 2018-11-01 01:22:09 -03:00
Alex Barney
9cb57fb4bb Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484) 
* Change naming convention for Ryujinx project

* Change naming convention for ChocolArm64 project

* Fix NaN

* Remove unneeded this. from Ryujinx project

* Adjust naming from new PRs

* Name changes based on feedback

* How did this get removed?

* Rebasing fix

* Change FP enum case

* Remove prefix from ChocolArm64 classes - Part 1

* Remove prefix from ChocolArm64 classes - Part 2

* Fix alignment from last commit's renaming

* Rename namespaces

* Rename stragglers

* Fix alignment

* Rename OpCode class

* Missed a few

* Adjust alignment
 2018-10-30 22:43:02 -03:00
LDj3SNuD
ca1e37a295 Remove old Tester, update Tests (some reworks). (#400) 
* Delete Bits.cs

* Delete Integer.cs

* Delete Instructions.cs

* Delete Pseudocode.cs

* Add files via upload

* Add mnemonic.

* Literals all uppercase.

* Nit.

* Allow FPSR control.

* Allow FPSR control.

* Allow FPSR control.
 2018-09-08 14:23:07 -03:00
Merry
326777ca4a Ryujinx.Tests: Add unicorn to test framework (#389) 
* Ryujinx.Tests: Add unicorn to test framework

* CpuTestSimdArithmetic: Comment out inaccurate results
 2018-09-01 11:24:05 -03:00
LDj3SNuD
02a6fdcd13 Add Sqdmulh_S, Sqdmulh_V, Sqrdmulh_S, Sqrdmulh_V instructions; add 6 Tests. Now all saturating methods are on ASoftFallback. (#334) 
* Update Instructions.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdReg.cs

* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update AInstEmitSimdHelper.cs

* Update ASoftFallback.cs

* Update CpuTestAlu.cs

* Update CpuTestAluImm.cs

* Update CpuTestAluRs.cs

* Update CpuTestAluRx.cs

* Update CpuTestBfm.cs

* Update CpuTestCcmpImm.cs

* Update CpuTestCcmpReg.cs

* Update CpuTestCsel.cs

* Update CpuTestMov.cs

* Update CpuTestMul.cs

* Update Ryujinx.Tests.csproj

* Update Ryujinx.csproj

* Update Luea.csproj

* Update Ryujinx.ShaderTools.csproj

* Address PR feedback (further tested).

* Address PR feedback.
 2018-08-10 14:27:15 -03:00
LDj3SNuD
3bdd109f45 Add Cmeq_S, Cmge_S, Cmgt_S, Cmhi_S, Cmhs_S, Cmle_S, Cmlt_S (Reg, Zero) & Cmtst_S compare instructions. Add 22 compare tests (Scalar, Vector). Add Eor_V, Not_V tests. (#171) 
* Add files via upload

* Add files via upload

* Delete CpuTestScalar.cs

* Update CpuTestSimdArithmetic.cs
 2018-06-18 14:55:26 -03:00
gdkchan
f9f111bc85
Add intrinsics support (#121) 
* Initial intrinsics support

* Update tests to work with the new Vector128 type and intrinsics

* Drop SSE4.1 requirement

* Fix copy-paste mistake
 2018-05-11 20:10:27 -03:00
LDj3SNuD
e9a96e3522 Add 151 complete tests for 71 base instructions of types: Alu; AluImm; AluRs; AluRx; Bfm; CcmpImm; CcmpReg; Csel; Mov; Mul. (#80) 
* Add files via upload

* Update Ryujinx.Tests.csproj
 2018-04-18 17:22:45 -03:00
MS-DOS1999
c9ef25681d Add Frintx_S, ASRV test, update ADCS, use Assert.Multiple and indent (#44) 
* add 'ADC 32bit and Overflow' test

* Add WZR/WSP tests

* fix ADC and ADDS

* add ADCS test

* add SBCS test

* indent my code and delete comment

* '/' <- i hate you x)

* remove spacebar char

* remove false tab

* add frintx_S test

* update frintx_S test

* add ASRV test

* fix new line

* fix PR

* fix indent
 2018-03-05 09:21:19 -03:00
MS-DOS1999
a4ff0d3484 Update ADC test, add WZR/WSP, ADCS, SBCS test (#37) 
* add 'ADC 32bit and Overflow' test

* Add WZR/WSP tests

* fix ADC and ADDS

* add ADCS test

* add SBCS test

* indent my code and delete comment

* '/' <- i hate you x)

* remove spacebar char

* remove false tab
 2018-02-24 22:50:58 -03:00
MS-DOS1999
eafc58c9f2 Add flags parameters in singleOpcode function, and add ADC Test (#36) 
* Add flags parameters in singleOpcode function, and add ADC Test

* Update CpuTestAlu.cs

* Update CpuTestAlu.cs

* Update CpuTestAlu.cs

* Update CpuTestAlu.cs
 2018-02-23 11:53:32 -03:00
LDj3SNuD
f09a0082bf Review of cpu tests and creation of a class for mixed cpu tests. (#35) 
* Update CpuTest.cs

* Update CpuTestAlu.cs

* Update CpuTestScalar.cs

* Update CpuTestSimdMove.cs

* Create CpuTestMisc.cs

* Update CpuTest.cs

* Update CpuTestScalar.cs

* Update CpuTest.cs

* Update CpuTestAlu.cs

* Update CpuTestMisc.cs

* Update CpuTestScalar.cs
 2018-02-23 09:29:20 -03:00
gdkchan
f35d286c8d Rename ARegisters to AThreadState 2018-02-18 16:28:07 -03:00
Merry
1bfe6a9c22 Add some tests (#18) 
* Add tests

* Add some simple Alu instruction tests

* travis: Run tests

* CpuTest: Add TearDown
 2018-02-15 21:04:38 -03:00