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LDj3SNuD 0679084f11 CPU (A64): Add FP16/FP32 fast paths (F16C Intrinsics) for Fcvt_S, Fcvtl_V & Fcvtn_V Instructions. Now HardwareCapabilities uses CpuId. (#1650) ... * net5.0 * CPU (A64): Add FP16/FP32 fast paths (F16C Intrinsics) for Fcvt_S, Fcvtl_V & Fcvtn_V Instructions. Switch to .NET 5.0. Nits. Tests performed successfully in both debug and release mode (for all instructions involved). * Address comment. * Update appveyor.yml * Revert "Update appveyor.yml" This reverts commit 27cdd59e8b90e227e6924d9c162af26c00a89013. * Remove Assembler CpuId. * Update appveyor.yml * Address comment.		2020-11-18 19:35:54 +01:00
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Optimizations	Implement block placement (#1549)	2020-09-19 20:00:24 -03:00
RegisterAllocators	Fix LiveInterval.Split (#1660)	2020-11-04 23:09:45 -03:00
Unwinding	Add Profiled Persistent Translation Cache. (#769)	2020-06-16 20:28:02 +02:00
X86	CPU (A64): Add FP16/FP32 fast paths (F16C Intrinsics) for Fcvt_S, Fcvtl_V & Fcvtn_V Instructions. Now HardwareCapabilities uses CpuId. (#1650)	2020-11-18 19:35:54 +01:00
CompiledFunction.cs	Add a new JIT compiler for CPU code (#693)	2019-08-08 21:56:22 +03:00