b97ff4da5e
* Tests: Add A32 tests for immediate ADC/ADCS/RSC/RSCS/SBC/SBCS * A32: Fix bug in ADC/ADCS/RSC/RSCS/SBC/SBCS * CpuTestAluImm32: Add more opcodes * Increment PTC version
57 lines
1.8 KiB
C#
57 lines
1.8 KiB
C#
#define AluRs32
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using NUnit.Framework;
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using System.Runtime.CompilerServices;
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namespace Ryujinx.Tests.Cpu
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{
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[Category("AluImm32")]
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public sealed class CpuTestAluImm32 : CpuTest32
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{
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#if AluRs32
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#region "ValueSource (Opcodes)"
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private static uint[] _opcodes()
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{
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return new uint[]
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{
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0xe2a00000u, // ADC R0, R0, #0
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0xe2b00000u, // ADCS R0, R0, #0
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0xe2800000u, // ADD R0, R0, #0
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0xe2900000u, // ADDS R0, R0, #0
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0xe3c00000u, // BIC R0, R0, #0
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0xe3d00000u, // BICS R0, R0, #0
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0xe2600000u, // RSB R0, R0, #0
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0xe2700000u, // RSBS R0, R0, #0
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0xe2e00000u, // RSC R0, R0, #0
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0xe2f00000u, // RSCS R0, R0, #0
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0xe2c00000u, // SBC R0, R0, #0
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0xe2d00000u, // SBCS R0, R0, #0
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0xe2400000u, // SUB R0, R0, #0
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0xe2500000u, // SUBS R0, R0, #0
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};
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}
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#endregion
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private const int RndCnt = 2;
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private const int RndCntAmount = 2;
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[Test, Pairwise]
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public void TestCpuTestAluImm32([ValueSource("_opcodes")] uint opcode,
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[Values(0u, 13u)] uint rd,
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[Values(1u, 13u)] uint rn,
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[Random(RndCnt)] uint imm,
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[Random(RndCnt)] uint wn,
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[Values(true, false)] bool carryIn)
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{
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opcode |= ((imm & 0xfff) << 0) | ((rn & 15) << 16) | ((rd & 15) << 12);
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uint sp = TestContext.CurrentContext.Random.NextUInt();
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SingleOpcode(opcode, r1: wn, sp: sp, carry: carryIn);
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CompareAgainstUnicorn();
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}
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#endif
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}
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}
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