0
0
Fork 0
This repository has been archived on 2024-10-12. You can view files and clone it, but cannot push or open issues or pull requests.
ryujinx-final/ARMeilleure/Decoders/OpCodeSimdMemReg.cs
gdkchan 6cc187da59
SIMD&FP load/store with scale > 4 should be undefined (#1522)
* SIMD&FP load/store with scale > 4 should be undefined

* Catch more invalid encodings for FP&SIMD LDR/STR (reg variant)

* Set PTC version to PR number
2020-09-01 17:02:23 -03:00

19 lines
No EOL
438 B
C#

namespace ARMeilleure.Decoders
{
class OpCodeSimdMemReg : OpCodeMemReg, IOpCodeSimd
{
public OpCodeSimdMemReg(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
{
Size |= (opCode >> 21) & 4;
if (Size > 4)
{
Instruction = InstDescriptor.Undefined;
return;
}
Extend64 = false;
}
}
}