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ryujinx-final/ARMeilleure/IntermediateRepresentation
FICTURE7 9d7627af64
Add multi-level function table (#2228)
* Add AddressTable<T>

* Use AddressTable<T> for dispatch

* Remove JumpTable & co.

* Add fallback for out of range addresses

* Add PPTC support

* Add documentation to `AddressTable<T>`

* Make AddressTable<T> configurable

* Fix table walk

* Fix IsMapped check

* Remove CountTableCapacity

* Add PPTC support for fast path

* Rename IsMapped to IsValid

* Remove stale comment

* Change format of address in exception message

* Add TranslatorStubs

* Split DispatchStub

Avoids recompilation of stubs during tests.

* Add hint for 64bit or 32bit

* Add documentation to `Symbol`

* Add documentation to `TranslatorStubs`

Make `TranslatorStubs` disposable as well.

* Add documentation to `SymbolType`

* Add `AddressTableEventSource` to monitor function table size

Add an EventSource which measures the amount of unmanaged bytes
allocated by AddressTable<T> instances.

 dotnet-counters monitor -n Ryujinx --counters ARMeilleure

* Add `AllowLcqInFunctionTable` optimization toggle

This is to reduce the impact this change has on the test duration.
Before everytime a test was ran, the FunctionTable would be initialized
and populated so that the newly compiled test would get registered to
it.

* Implement unmanaged dispatcher

Uses the DispatchStub to dispatch into the next translation, which
allows execution to stay in unmanaged for longer and skips a
ConcurrentDictionary look up when the target translation has been
registered to the FunctionTable.

* Remove redundant null check

* Tune levels of FunctionTable

Uses 5 levels instead of 4 and change unit of AddressTableEventSource
from KB to MB.

* Use 64-bit function table

Improves codegen for direct branches:

    mov qword [rax+0x408],0x10603560
 -  mov rcx,sub_10603560_OFFSET
 -  mov ecx,[rcx]
 -  mov ecx,ecx
 -  mov rdx,JIT_CACHE_BASE
 -  add rdx,rcx
 +  mov rcx,sub_10603560
 +  mov rdx,[rcx]
    mov rcx,rax

Improves codegen for dispatch stub:

    and rax,byte +0x1f
 -  mov eax,[rcx+rax*4]
 -  mov eax,eax
 -  mov rcx,JIT_CACHE_BASE
 -  lea rax,[rcx+rax]
 +  mov rax,[rcx+rax*8]
    mov rcx,rbx

* Remove `JitCacheSymbol` & `JitCache.Offset`

* Turn `Translator.Translate` into an instance method

We do not have to add more parameter to this method and related ones as
new structures are added & needed for translation.

* Add symbol only when PTC is enabled

Address LDj3SNuD's feedback

* Change `NativeContext.Running` to a 32-bit integer

* Fix PageTable symbol for host mapped
2021-05-29 18:06:28 -03:00
..
BasicBlock.cs Implement block placement (#1549) 2020-09-19 20:00:24 -03:00
BasicBlockFrequency.cs Implement block placement (#1549) 2020-09-19 20:00:24 -03:00
Comparison.cs Improve branch operations (#1442) 2020-08-05 08:52:33 +10:00
IIntrusiveListNode.cs Replace LinkedList by IntrusiveList to avoid allocations on JIT (#931) 2020-02-17 22:30:54 +01:00
Instruction.cs Relax block ordering constraints (#1535) 2020-09-12 12:32:53 -03:00
Intrinsic.cs CPU (A64): Add Fmaxnmp & Fminnmp Scalar Inst.s, Fast & Slow Paths; with Tests. (#1894) 2021-01-20 09:12:33 +11:00
IntrinsicOperation.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
IntrusiveList.cs Replace LinkedList by IntrusiveList to avoid allocations on JIT (#931) 2020-02-17 22:30:54 +01:00
MemoryOperand.cs CodeGen Optimisations (LSRA and Translator) (#978) 2020-03-18 22:44:32 +11:00
Multiplier.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
Node.cs Fix Node Uses/Assignments (#1376) 2020-07-13 20:20:07 +10:00
Operand.cs Add multi-level function table (#2228) 2021-05-29 18:06:28 -03:00
OperandHelper.cs Add multi-level function table (#2228) 2021-05-29 18:06:28 -03:00
OperandKind.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
OperandType.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
Operation.cs CodeGen Optimisations (LSRA and Translator) (#978) 2020-03-18 22:44:32 +11:00
OperationHelper.cs PPTC & Pool Enhancements. (#1968) 2021-02-22 03:23:48 +01:00
PhiNode.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
Register.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
RegisterType.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00