eefe2b20fc
* Fix Fcmge_S/V & Fcmgt_S/V. Follow-up Fcm**_S/V & Fc*mp*_S. Improve CmpCondition enum. Nits. * Optimize Fccmp*_S & Fcmp*_S. * Fix cvtsd2si opcode. * Address PR feedback.
52 lines
No EOL
2 KiB
C#
52 lines
No EOL
2 KiB
C#
using ARMeilleure.IntermediateRepresentation;
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using ARMeilleure.Translation;
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namespace ARMeilleure.CodeGen.X86
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{
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static class HardwareCapabilities
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{
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private delegate ulong GetFeatureInfo();
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private static ulong _featureInfo;
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public static bool SupportsSse3 => (_featureInfo & (1UL << 0)) != 0;
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public static bool SupportsPclmulqdq => (_featureInfo & (1UL << 1)) != 0;
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public static bool SupportsSsse3 => (_featureInfo & (1UL << 9)) != 0;
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public static bool SupportsFma => (_featureInfo & (1UL << 12)) != 0;
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public static bool SupportsCx16 => (_featureInfo & (1UL << 13)) != 0;
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public static bool SupportsSse41 => (_featureInfo & (1UL << 19)) != 0;
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public static bool SupportsSse42 => (_featureInfo & (1UL << 20)) != 0;
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public static bool SupportsPopcnt => (_featureInfo & (1UL << 23)) != 0;
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public static bool SupportsAesni => (_featureInfo & (1UL << 25)) != 0;
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public static bool SupportsAvx => (_featureInfo & (1UL << 28)) != 0;
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public static bool SupportsF16c => (_featureInfo & (1UL << 29)) != 0;
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public static bool SupportsSse => (_featureInfo & (1UL << 32 + 25)) != 0;
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public static bool SupportsSse2 => (_featureInfo & (1UL << 32 + 26)) != 0;
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public static bool ForceLegacySse { get; set; }
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public static bool SupportsVexEncoding => SupportsAvx && !ForceLegacySse;
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static HardwareCapabilities()
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{
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EmitterContext context = new EmitterContext();
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Operand featureInfo = context.CpuId();
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context.Return(featureInfo);
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ControlFlowGraph cfg = context.GetControlFlowGraph();
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OperandType[] argTypes = new OperandType[0];
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GetFeatureInfo getFeatureInfo = Compiler.Compile<GetFeatureInfo>(
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cfg,
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argTypes,
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OperandType.I64,
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CompilerOptions.HighCq);
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_featureInfo = getFeatureInfo();
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}
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}
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} |