0
0
Fork 0
This repository has been archived on 2024-10-12. You can view files and clone it, but cannot push or open issues or pull requests.
ryujinx-final/Ryujinx/Cpu/Decoder
2018-02-15 01:32:25 -03:00
..
ABlock.cs aloha 2018-02-04 20:08:20 -03:00
ACond.cs aloha 2018-02-04 20:08:20 -03:00
ADataOp.cs aloha 2018-02-04 20:08:20 -03:00
ADecoder.cs Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
ADecoderHelper.cs aloha 2018-02-04 20:08:20 -03:00
AIntType.cs aloha 2018-02-04 20:08:20 -03:00
AOpCode.cs Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
AOpCodeAdr.cs Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
AOpCodeAlu.cs Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
AOpCodeAluImm.cs Generate CIL for SCVTF (vector), add undefined encodings for some instructions 2018-02-12 00:37:20 -03:00
AOpCodeAluRs.cs Generate CIL for SCVTF (vector), add undefined encodings for some instructions 2018-02-12 00:37:20 -03:00
AOpCodeAluRx.cs aloha 2018-02-04 20:08:20 -03:00
AOpCodeBfm.cs aloha 2018-02-04 20:08:20 -03:00
AOpCodeBImm.cs Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
AOpCodeBImmAl.cs Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
AOpCodeBImmCmp.cs Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
AOpCodeBImmCond.cs Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
AOpCodeBImmTest.cs Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
AOpCodeBReg.cs Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
AOpCodeCcmp.cs aloha 2018-02-04 20:08:20 -03:00
AOpCodeCcmpImm.cs aloha 2018-02-04 20:08:20 -03:00
AOpCodeCcmpReg.cs aloha 2018-02-04 20:08:20 -03:00
AOpCodeCsel.cs aloha 2018-02-04 20:08:20 -03:00
AOpCodeException.cs Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
AOpCodeMem.cs Emit CIL directly for more SIMD instructions, add UCVTF (vector, scalar) and UZP2, fix XTN (?) 2018-02-15 01:32:25 -03:00
AOpCodeMemEx.cs aloha 2018-02-04 20:08:20 -03:00
AOpCodeMemImm.cs aloha 2018-02-04 20:08:20 -03:00
AOpCodeMemLit.cs Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
AOpCodeMemPair.cs aloha 2018-02-04 20:08:20 -03:00
AOpCodeMemReg.cs aloha 2018-02-04 20:08:20 -03:00
AOpCodeMov.cs Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
AOpCodeMul.cs aloha 2018-02-04 20:08:20 -03:00
AOpCodeSimd.cs Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
AOpCodeSimdCvt.cs aloha 2018-02-04 20:08:20 -03:00
AOpCodeSimdFcond.cs aloha 2018-02-04 20:08:20 -03:00
AOpCodeSimdFmov.cs Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
AOpCodeSimdImm.cs Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
AOpCodeSimdIns.cs aloha 2018-02-04 20:08:20 -03:00
AOpCodeSimdMemImm.cs aloha 2018-02-04 20:08:20 -03:00
AOpCodeSimdMemLit.cs Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
AOpCodeSimdMemMs.cs Emit CIL directly for more SIMD instructions, add UCVTF (vector, scalar) and UZP2, fix XTN (?) 2018-02-15 01:32:25 -03:00
AOpCodeSimdMemPair.cs aloha 2018-02-04 20:08:20 -03:00
AOpCodeSimdMemReg.cs aloha 2018-02-04 20:08:20 -03:00
AOpCodeSimdMemSs.cs Emit CIL directly for more SIMD instructions, add UCVTF (vector, scalar) and UZP2, fix XTN (?) 2018-02-15 01:32:25 -03:00
AOpCodeSimdReg.cs Add FMADD and FMSUB instructions 2018-02-07 20:07:16 -03:00
AOpCodeSimdRegElem.cs Emit CIL directly for more SIMD instructions, add UCVTF (vector, scalar) and UZP2, fix XTN (?) 2018-02-15 01:32:25 -03:00
AOpCodeSimdShImm.cs Move a few more SIMD instructions to emit CIL directly instead of a method call 2018-02-09 17:14:47 -03:00
AOpCodeSimdTbl.cs aloha 2018-02-04 20:08:20 -03:00
AOpCodeSystem.cs Only throw undefined instruction exception at execution, not at translation stage 2018-02-10 14:20:46 -03:00
AShiftType.cs aloha 2018-02-04 20:08:20 -03:00
IAOpCode.cs aloha 2018-02-04 20:08:20 -03:00
IAOpCodeAlu.cs aloha 2018-02-04 20:08:20 -03:00
IAOpCodeAluImm.cs aloha 2018-02-04 20:08:20 -03:00
IAOpCodeAluRs.cs aloha 2018-02-04 20:08:20 -03:00
IAOpCodeAluRx.cs aloha 2018-02-04 20:08:20 -03:00
IAOpCodeCond.cs aloha 2018-02-04 20:08:20 -03:00
IAOpCodeLit.cs aloha 2018-02-04 20:08:20 -03:00
IAOpCodeSimd.cs aloha 2018-02-04 20:08:20 -03:00