269 lines
9.4 KiB
C#
269 lines
9.4 KiB
C#
using ARMeilleure.Decoders;
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using ARMeilleure.IntermediateRepresentation;
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using ARMeilleure.State;
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using ARMeilleure.Translation;
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using System;
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using static ARMeilleure.IntermediateRepresentation.Operand.Factory;
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namespace ARMeilleure.Instructions
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{
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static class InstEmitHelper
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{
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public static bool IsThumb(OpCode op)
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{
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return op is OpCodeT16;
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}
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public static Operand GetExtendedM(ArmEmitterContext context, int rm, IntType type)
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{
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Operand value = GetIntOrZR(context, rm);
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switch (type)
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{
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case IntType.UInt8: value = context.ZeroExtend8 (value.Type, value); break;
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case IntType.UInt16: value = context.ZeroExtend16(value.Type, value); break;
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case IntType.UInt32: value = context.ZeroExtend32(value.Type, value); break;
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case IntType.Int8: value = context.SignExtend8 (value.Type, value); break;
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case IntType.Int16: value = context.SignExtend16(value.Type, value); break;
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case IntType.Int32: value = context.SignExtend32(value.Type, value); break;
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}
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return value;
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}
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public static Operand GetIntA32(ArmEmitterContext context, int regIndex)
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{
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if (regIndex == RegisterAlias.Aarch32Pc)
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{
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OpCode32 op = (OpCode32)context.CurrOp;
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return Const((int)op.GetPc());
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}
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else
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{
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return Register(GetRegisterAlias(context.Mode, regIndex), RegisterType.Integer, OperandType.I32);
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}
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}
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public static Operand GetIntA32AlignedPC(ArmEmitterContext context, int regIndex)
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{
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if (regIndex == RegisterAlias.Aarch32Pc)
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{
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OpCode32 op = (OpCode32)context.CurrOp;
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return Const((int)(op.GetPc() & 0xfffffffc));
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}
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else
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{
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return Register(GetRegisterAlias(context.Mode, regIndex), RegisterType.Integer, OperandType.I32);
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}
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}
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public static Operand GetVecA32(int regIndex)
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{
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return Register(regIndex, RegisterType.Vector, OperandType.V128);
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}
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public static void SetIntA32(ArmEmitterContext context, int regIndex, Operand value)
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{
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if (regIndex == RegisterAlias.Aarch32Pc)
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{
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if (!IsA32Return(context))
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{
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context.StoreToContext();
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}
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EmitBxWritePc(context, value);
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}
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else
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{
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if (value.Type == OperandType.I64)
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{
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value = context.ConvertI64ToI32(value);
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}
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Operand reg = Register(GetRegisterAlias(context.Mode, regIndex), RegisterType.Integer, OperandType.I32);
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context.Copy(reg, value);
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}
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}
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public static int GetRegisterAlias(Aarch32Mode mode, int regIndex)
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{
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// Only registers >= 8 are banked,
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// with registers in the range [8, 12] being
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// banked for the FIQ mode, and registers
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// 13 and 14 being banked for all modes.
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if ((uint)regIndex < 8)
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{
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return regIndex;
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}
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return GetBankedRegisterAlias(mode, regIndex);
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}
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public static int GetBankedRegisterAlias(Aarch32Mode mode, int regIndex)
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{
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switch (regIndex)
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{
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case 8: return mode == Aarch32Mode.Fiq
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? RegisterAlias.R8Fiq
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: RegisterAlias.R8Usr;
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case 9: return mode == Aarch32Mode.Fiq
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? RegisterAlias.R9Fiq
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: RegisterAlias.R9Usr;
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case 10: return mode == Aarch32Mode.Fiq
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? RegisterAlias.R10Fiq
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: RegisterAlias.R10Usr;
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case 11: return mode == Aarch32Mode.Fiq
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? RegisterAlias.R11Fiq
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: RegisterAlias.R11Usr;
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case 12: return mode == Aarch32Mode.Fiq
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? RegisterAlias.R12Fiq
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: RegisterAlias.R12Usr;
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case 13:
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switch (mode)
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{
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case Aarch32Mode.User:
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case Aarch32Mode.System: return RegisterAlias.SpUsr;
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case Aarch32Mode.Fiq: return RegisterAlias.SpFiq;
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case Aarch32Mode.Irq: return RegisterAlias.SpIrq;
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case Aarch32Mode.Supervisor: return RegisterAlias.SpSvc;
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case Aarch32Mode.Abort: return RegisterAlias.SpAbt;
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case Aarch32Mode.Hypervisor: return RegisterAlias.SpHyp;
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case Aarch32Mode.Undefined: return RegisterAlias.SpUnd;
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default: throw new ArgumentException(nameof(mode));
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}
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case 14:
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switch (mode)
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{
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case Aarch32Mode.User:
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case Aarch32Mode.Hypervisor:
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case Aarch32Mode.System: return RegisterAlias.LrUsr;
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case Aarch32Mode.Fiq: return RegisterAlias.LrFiq;
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case Aarch32Mode.Irq: return RegisterAlias.LrIrq;
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case Aarch32Mode.Supervisor: return RegisterAlias.LrSvc;
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case Aarch32Mode.Abort: return RegisterAlias.LrAbt;
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case Aarch32Mode.Undefined: return RegisterAlias.LrUnd;
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default: throw new ArgumentException(nameof(mode));
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}
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default: throw new ArgumentOutOfRangeException(nameof(regIndex));
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}
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}
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public static bool IsA32Return(ArmEmitterContext context)
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{
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switch (context.CurrOp)
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{
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case IOpCode32MemMult op:
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return true; // Setting PC using LDM is nearly always a return.
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case OpCode32AluRsImm op:
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return op.Rm == RegisterAlias.Aarch32Lr;
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case OpCode32AluRsReg op:
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return op.Rm == RegisterAlias.Aarch32Lr;
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case OpCode32AluReg op:
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return op.Rm == RegisterAlias.Aarch32Lr;
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case OpCode32Mem op:
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return op.Rn == RegisterAlias.Aarch32Sp && op.WBack && !op.Index; // Setting PC to an address stored on the stack is nearly always a return.
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}
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return false;
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}
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public static void EmitBxWritePc(ArmEmitterContext context, Operand pc, int sourceRegister = 0)
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{
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bool isReturn = sourceRegister == RegisterAlias.Aarch32Lr || IsA32Return(context);
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Operand mode = context.BitwiseAnd(pc, Const(1));
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SetFlag(context, PState.TFlag, mode);
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Operand addr = context.ConditionalSelect(mode, pc, context.BitwiseAnd(pc, Const(~3)));
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InstEmitFlowHelper.EmitVirtualJump(context, addr, isReturn);
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}
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public static Operand GetIntOrZR(ArmEmitterContext context, int regIndex)
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{
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if (regIndex == RegisterConsts.ZeroIndex)
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{
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OperandType type = context.CurrOp.GetOperandType();
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return type == OperandType.I32 ? Const(0) : Const(0L);
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}
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else
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{
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return GetIntOrSP(context, regIndex);
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}
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}
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public static void SetIntOrZR(ArmEmitterContext context, int regIndex, Operand value)
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{
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if (regIndex == RegisterConsts.ZeroIndex)
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{
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return;
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}
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SetIntOrSP(context, regIndex, value);
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}
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public static Operand GetIntOrSP(ArmEmitterContext context, int regIndex)
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{
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Operand value = Register(regIndex, RegisterType.Integer, OperandType.I64);
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if (context.CurrOp.RegisterSize == RegisterSize.Int32)
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{
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value = context.ConvertI64ToI32(value);
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}
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return value;
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}
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public static void SetIntOrSP(ArmEmitterContext context, int regIndex, Operand value)
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{
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Operand reg = Register(regIndex, RegisterType.Integer, OperandType.I64);
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if (value.Type == OperandType.I32)
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{
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value = context.ZeroExtend32(OperandType.I64, value);
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}
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context.Copy(reg, value);
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}
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public static Operand GetVec(int regIndex)
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{
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return Register(regIndex, RegisterType.Vector, OperandType.V128);
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}
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public static Operand GetFlag(PState stateFlag)
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{
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return Register((int)stateFlag, RegisterType.Flag, OperandType.I32);
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}
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public static Operand GetFpFlag(FPState stateFlag)
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{
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return Register((int)stateFlag, RegisterType.FpFlag, OperandType.I32);
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}
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public static void SetFlag(ArmEmitterContext context, PState stateFlag, Operand value)
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{
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context.Copy(GetFlag(stateFlag), value);
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context.MarkFlagSet(stateFlag);
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}
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public static void SetFpFlag(ArmEmitterContext context, FPState stateFlag, Operand value)
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{
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context.Copy(GetFpFlag(stateFlag), value);
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}
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}
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}
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