40b21cc3c4
* 3D engine now uses DeviceState too, plus new state modification tracking * Remove old methods code * Remove GpuState and friends * Optimize DeviceState, force inline some functions * This change was not supposed to go in * Proper channel initialization * Optimize state read/write methods even more * Fix debug build * Do not dirty state if the write is redundant * The YControl register should dirty either the viewport or front face state too, to update the host origin * Avoid redundant vertex buffer updates * Move state and get rid of the Ryujinx.Graphics.Gpu.State namespace * Comments and nits * Fix rebase * PR feedback * Move changed = false to improve codegen * PR feedback * Carry RyuJIT a bit more
275 lines
No EOL
10 KiB
C#
275 lines
No EOL
10 KiB
C#
using Ryujinx.Graphics.Gpu.Engine.Types;
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using System;
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using System.Runtime.CompilerServices;
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namespace Ryujinx.Graphics.Gpu.Engine.Compute
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{
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/// <summary>
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/// Type of the dependent Queue Meta Data.
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/// </summary>
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enum DependentQmdType
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{
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Queue,
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Grid
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}
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/// <summary>
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/// Type of the release memory barrier.
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/// </summary>
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enum ReleaseMembarType
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{
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FeNone,
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FeSysmembar
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}
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/// <summary>
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/// Type of the CWD memory barrier.
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/// </summary>
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enum CwdMembarType
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{
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L1None,
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L1Sysmembar,
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L1Membar
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}
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/// <summary>
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/// NaN behavior of 32-bits float operations on the shader.
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/// </summary>
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enum Fp32NanBehavior
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{
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Legacy,
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Fp64Compatible
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}
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/// <summary>
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/// NaN behavior of 32-bits float to integer conversion on the shader.
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/// </summary>
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enum Fp32F2iNanBehavior
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{
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PassZero,
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PassIndefinite
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}
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/// <summary>
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/// Limit of calls.
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/// </summary>
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enum ApiVisibleCallLimit
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{
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_32,
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NoCheck
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}
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/// <summary>
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/// Shared memory bank mapping mode.
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/// </summary>
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enum SharedMemoryBankMapping
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{
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FourBytesPerBank,
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EightBytesPerBank
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}
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/// <summary>
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/// Denormal behavior of 32-bits float narrowing instructions.
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/// </summary>
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enum Fp32NarrowInstruction
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{
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KeepDenorms,
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FlushDenorms
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}
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/// <summary>
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/// Configuration of the L1 cache.
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/// </summary>
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enum L1Configuration
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{
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DirectlyAddressableMemorySize16kb,
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DirectlyAddressableMemorySize32kb,
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DirectlyAddressableMemorySize48kb
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}
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/// <summary>
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/// Reduction operation.
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/// </summary>
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enum ReductionOp
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{
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RedAdd,
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RedMin,
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RedMax,
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RedInc,
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RedDec,
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RedAnd,
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RedOr,
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RedXor
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}
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/// <summary>
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/// Reduction format.
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/// </summary>
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enum ReductionFormat
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{
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Unsigned32,
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Signed32
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}
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/// <summary>
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/// Size of a structure in words.
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/// </summary>
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enum StructureSize
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{
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FourWords,
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OneWord
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}
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/// <summary>
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/// Compute Queue Meta Data.
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/// </summary>
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unsafe struct ComputeQmd
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{
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private fixed int _words[64];
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public int OuterPut => BitRange(30, 0);
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public bool OuterOverflow => Bit(31);
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public int OuterGet => BitRange(62, 32);
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public bool OuterStickyOverflow => Bit(63);
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public int InnerGet => BitRange(94, 64);
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public bool InnerOverflow => Bit(95);
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public int InnerPut => BitRange(126, 96);
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public bool InnerStickyOverflow => Bit(127);
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public int QmdReservedAA => BitRange(159, 128);
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public int DependentQmdPointer => BitRange(191, 160);
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public int QmdGroupId => BitRange(197, 192);
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public bool SmGlobalCachingEnable => Bit(198);
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public bool RunCtaInOneSmPartition => Bit(199);
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public bool IsQueue => Bit(200);
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public bool AddToHeadOfQmdGroupLinkedList => Bit(201);
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public bool SemaphoreReleaseEnable0 => Bit(202);
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public bool SemaphoreReleaseEnable1 => Bit(203);
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public bool RequireSchedulingPcas => Bit(204);
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public bool DependentQmdScheduleEnable => Bit(205);
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public DependentQmdType DependentQmdType => (DependentQmdType)BitRange(206, 206);
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public bool DependentQmdFieldCopy => Bit(207);
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public int QmdReservedB => BitRange(223, 208);
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public int CircularQueueSize => BitRange(248, 224);
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public bool QmdReservedC => Bit(249);
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public bool InvalidateTextureHeaderCache => Bit(250);
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public bool InvalidateTextureSamplerCache => Bit(251);
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public bool InvalidateTextureDataCache => Bit(252);
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public bool InvalidateShaderDataCache => Bit(253);
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public bool InvalidateInstructionCache => Bit(254);
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public bool InvalidateShaderConstantCache => Bit(255);
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public int ProgramOffset => BitRange(287, 256);
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public int CircularQueueAddrLower => BitRange(319, 288);
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public int CircularQueueAddrUpper => BitRange(327, 320);
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public int QmdReservedD => BitRange(335, 328);
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public int CircularQueueEntrySize => BitRange(351, 336);
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public int CwdReferenceCountId => BitRange(357, 352);
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public int CwdReferenceCountDeltaMinusOne => BitRange(365, 358);
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public ReleaseMembarType ReleaseMembarType => (ReleaseMembarType)BitRange(366, 366);
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public bool CwdReferenceCountIncrEnable => Bit(367);
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public CwdMembarType CwdMembarType => (CwdMembarType)BitRange(369, 368);
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public bool SequentiallyRunCtas => Bit(370);
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public bool CwdReferenceCountDecrEnable => Bit(371);
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public bool Throttled => Bit(372);
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public Fp32NanBehavior Fp32NanBehavior => (Fp32NanBehavior)BitRange(376, 376);
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public Fp32F2iNanBehavior Fp32F2iNanBehavior => (Fp32F2iNanBehavior)BitRange(377, 377);
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public ApiVisibleCallLimit ApiVisibleCallLimit => (ApiVisibleCallLimit)BitRange(378, 378);
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public SharedMemoryBankMapping SharedMemoryBankMapping => (SharedMemoryBankMapping)BitRange(379, 379);
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public SamplerIndex SamplerIndex => (SamplerIndex)BitRange(382, 382);
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public Fp32NarrowInstruction Fp32NarrowInstruction => (Fp32NarrowInstruction)BitRange(383, 383);
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public int CtaRasterWidth => BitRange(415, 384);
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public int CtaRasterHeight => BitRange(431, 416);
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public int CtaRasterDepth => BitRange(447, 432);
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public int CtaRasterWidthResume => BitRange(479, 448);
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public int CtaRasterHeightResume => BitRange(495, 480);
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public int CtaRasterDepthResume => BitRange(511, 496);
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public int QueueEntriesPerCtaMinusOne => BitRange(518, 512);
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public int CoalesceWaitingPeriod => BitRange(529, 522);
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public int SharedMemorySize => BitRange(561, 544);
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public int QmdReservedG => BitRange(575, 562);
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public int QmdVersion => BitRange(579, 576);
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public int QmdMajorVersion => BitRange(583, 580);
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public int QmdReservedH => BitRange(591, 584);
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public int CtaThreadDimension0 => BitRange(607, 592);
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public int CtaThreadDimension1 => BitRange(623, 608);
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public int CtaThreadDimension2 => BitRange(639, 624);
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public bool ConstantBufferValid(int i) => Bit(640 + i * 1);
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public int QmdReservedI => BitRange(668, 648);
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public L1Configuration L1Configuration => (L1Configuration)BitRange(671, 669);
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public int SmDisableMaskLower => BitRange(703, 672);
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public int SmDisableMaskUpper => BitRange(735, 704);
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public int Release0AddressLower => BitRange(767, 736);
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public int Release0AddressUpper => BitRange(775, 768);
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public int QmdReservedJ => BitRange(783, 776);
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public ReductionOp Release0ReductionOp => (ReductionOp)BitRange(790, 788);
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public bool QmdReservedK => Bit(791);
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public ReductionFormat Release0ReductionFormat => (ReductionFormat)BitRange(793, 792);
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public bool Release0ReductionEnable => Bit(794);
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public StructureSize Release0StructureSize => (StructureSize)BitRange(799, 799);
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public int Release0Payload => BitRange(831, 800);
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public int Release1AddressLower => BitRange(863, 832);
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public int Release1AddressUpper => BitRange(871, 864);
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public int QmdReservedL => BitRange(879, 872);
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public ReductionOp Release1ReductionOp => (ReductionOp)BitRange(886, 884);
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public bool QmdReservedM => Bit(887);
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public ReductionFormat Release1ReductionFormat => (ReductionFormat)BitRange(889, 888);
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public bool Release1ReductionEnable => Bit(890);
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public StructureSize Release1StructureSize => (StructureSize)BitRange(895, 895);
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public int Release1Payload => BitRange(927, 896);
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public int ConstantBufferAddrLower(int i) => BitRange(959 + i * 64, 928 + i * 64);
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public int ConstantBufferAddrUpper(int i) => BitRange(967 + i * 64, 960 + i * 64);
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public int ConstantBufferReservedAddr(int i) => BitRange(973 + i * 64, 968 + i * 64);
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public bool ConstantBufferInvalidate(int i) => Bit(974 + i * 64);
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public int ConstantBufferSize(int i) => BitRange(991 + i * 64, 975 + i * 64);
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public int ShaderLocalMemoryLowSize => BitRange(1463, 1440);
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public int QmdReservedN => BitRange(1466, 1464);
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public int BarrierCount => BitRange(1471, 1467);
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public int ShaderLocalMemoryHighSize => BitRange(1495, 1472);
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public int RegisterCount => BitRange(1503, 1496);
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public int ShaderLocalMemoryCrsSize => BitRange(1527, 1504);
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public int SassVersion => BitRange(1535, 1528);
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public int HwOnlyInnerGet => BitRange(1566, 1536);
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public bool HwOnlyRequireSchedulingPcas => Bit(1567);
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public int HwOnlyInnerPut => BitRange(1598, 1568);
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public bool HwOnlyScgType => Bit(1599);
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public int HwOnlySpanListHeadIndex => BitRange(1629, 1600);
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public bool QmdReservedQ => Bit(1630);
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public bool HwOnlySpanListHeadIndexValid => Bit(1631);
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public int HwOnlySkedNextQmdPointer => BitRange(1663, 1632);
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public int QmdSpareE => BitRange(1695, 1664);
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public int QmdSpareF => BitRange(1727, 1696);
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public int QmdSpareG => BitRange(1759, 1728);
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public int QmdSpareH => BitRange(1791, 1760);
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public int QmdSpareI => BitRange(1823, 1792);
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public int QmdSpareJ => BitRange(1855, 1824);
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public int QmdSpareK => BitRange(1887, 1856);
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public int QmdSpareL => BitRange(1919, 1888);
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public int QmdSpareM => BitRange(1951, 1920);
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public int QmdSpareN => BitRange(1983, 1952);
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public int DebugIdUpper => BitRange(2015, 1984);
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public int DebugIdLower => BitRange(2047, 2016);
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private bool Bit(int bit)
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{
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if ((uint)bit >= 64 * 32)
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{
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throw new ArgumentOutOfRangeException(nameof(bit));
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}
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return (_words[bit >> 5] & (1 << (bit & 31))) != 0;
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}
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private int BitRange(int upper, int lower)
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{
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if ((uint)lower >= 64 * 32)
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{
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throw new ArgumentOutOfRangeException(nameof(lower));
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}
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int mask = (int)(uint.MaxValue >> (32 - (upper - lower + 1)));
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return (_words[lower >> 5] >> (lower & 31)) & mask;
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}
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}
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} |