emu-mirrors/ryujinx-fork
0
0
Fork 0
mirror of https://github.com/ryujinx-mirror/ryujinx.git synced 2024-12-22 18:25:46 +00:00
Code Activity

CPU: Produce non-inf results for RSQRTE instruction with subnormal inputs (#6634)

Browse source 
* CPU: Produce non-inf results for RSQRTE instruction with subnormal inputs

* PPTC version bump
This commit is contained in:
gdkchan 2024-04-09 14:34:14 -03:00 committed by GitHub
parent 338ff79e1e
commit 543d75a587
No known key found for this signature in database
GPG key ID: B5690EEEBB952194
2 changed files with 11 additions and 3 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

12
src/ARMeilleure/Instructions/InstEmitSimdArithmetic.cs
View file

@ -2426,7 +2426,11 @@ namespace ARMeilleure.Instructions
} }
else if (Optimizations.FastFP && Optimizations.UseSse41 && sizeF == 0) else if (Optimizations.FastFP && Optimizations.UseSse41 && sizeF == 0)
{ {
Operand res = EmitSse41Round32Exp8OpF(context, context.AddIntrinsic(Intrinsic.X86Rsqrtss, GetVec(op.Rn)), scalar: true); // RSQRTSS handles subnormals as zero, which differs from Arm, so we can't use it here.
Operand res = context.AddIntrinsic(Intrinsic.X86Sqrtss, GetVec(op.Rn));
res = context.AddIntrinsic(Intrinsic.X86Rcpss, res);
res = EmitSse41Round32Exp8OpF(context, res, scalar: true);
context.Copy(GetVec(op.Rd), context.VectorZeroUpper96(res)); context.Copy(GetVec(op.Rd), context.VectorZeroUpper96(res));
} }
@ -2451,7 +2455,11 @@ namespace ARMeilleure.Instructions
} }
else if (Optimizations.FastFP && Optimizations.UseSse41 && sizeF == 0) else if (Optimizations.FastFP && Optimizations.UseSse41 && sizeF == 0)
{ {
Operand res = EmitSse41Round32Exp8OpF(context, context.AddIntrinsic(Intrinsic.X86Rsqrtps, GetVec(op.Rn)), scalar: false); // RSQRTPS handles subnormals as zero, which differs from Arm, so we can't use it here.
Operand res = context.AddIntrinsic(Intrinsic.X86Sqrtps, GetVec(op.Rn));
res = context.AddIntrinsic(Intrinsic.X86Rcpps, res);
res = EmitSse41Round32Exp8OpF(context, res, scalar: false);
if (op.RegisterSize == RegisterSize.Simd64) if (op.RegisterSize == RegisterSize.Simd64)
{ {

2
src/ARMeilleure/Translation/PTC/Ptc.cs
View file

@ -29,7 +29,7 @@ namespace ARMeilleure.Translation.PTC
private const string OuterHeaderMagicString = "PTCohd\0\0"; private const string OuterHeaderMagicString = "PTCohd\0\0";
private const string InnerHeaderMagicString = "PTCihd\0\0"; private const string InnerHeaderMagicString = "PTCihd\0\0";
private const uint InternalVersion = 6613; //! To be incremented manually for each change to the ARMeilleure project. private const uint InternalVersion = 6634; //! To be incremented manually for each change to the ARMeilleure project.
private const string ActualDir = "0"; private const string ActualDir = "0";
private const string BackupDir = "1"; private const string BackupDir = "1";