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ARMeilleure: A32: Implement SHADD8 (#3086)
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222b1ad7da
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4 changed files with 59 additions and 16 deletions
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@ -733,6 +733,7 @@ namespace ARMeilleure.Decoders
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SetA32("<<<<0000110xxxxxxxxxxxxx0xx1xxxx", InstName.Sbc, InstEmit32.Sbc, OpCode32AluRsReg.Create);
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SetA32("<<<<0111101xxxxxxxxxxxxxx101xxxx", InstName.Sbfx, InstEmit32.Sbfx, OpCode32AluBf.Create);
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SetA32("<<<<01110001xxxx1111xxxx0001xxxx", InstName.Sdiv, InstEmit32.Sdiv, OpCode32AluMla.Create);
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SetA32("<<<<01100011xxxxxxxx11111001xxxx", InstName.Shadd8, InstEmit32.Shadd8, OpCode32AluReg.Create);
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SetA32("<<<<00010000xxxxxxxxxxxx1xx0xxxx", InstName.Smla__, InstEmit32.Smla__, OpCode32AluMla.Create);
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SetA32("<<<<0000111xxxxxxxxxxxxx1001xxxx", InstName.Smlal, InstEmit32.Smlal, OpCode32AluUmull.Create);
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SetA32("<<<<00010100xxxxxxxxxxxx1xx0xxxx", InstName.Smlal__, InstEmit32.Smlal__, OpCode32AluUmull.Create);
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@ -387,6 +387,11 @@ namespace ARMeilleure.Instructions
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EmitDiv(context, false);
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}
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public static void Shadd8(ArmEmitterContext context)
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{
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EmitHadd8(context, false);
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}
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public static void Ssat(ArmEmitterContext context)
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{
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OpCode32Sat op = (OpCode32Sat)context.CurrOp;
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@ -474,20 +479,7 @@ namespace ARMeilleure.Instructions
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public static void Uhadd8(ArmEmitterContext context)
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{
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OpCode32AluReg op = (OpCode32AluReg)context.CurrOp;
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Operand m = GetIntA32(context, op.Rm);
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Operand n = GetIntA32(context, op.Rn);
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Operand xor, res;
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res = context.BitwiseAnd(m, n);
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xor = context.BitwiseExclusiveOr(m, n);
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xor = context.ShiftRightUI(xor, Const(1));
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xor = context.BitwiseAnd(xor, Const(0x7F7F7F7Fu));
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res = context.Add(res, xor);
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SetIntA32(context, op.Rd, res);
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EmitHadd8(context, true);
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}
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public static void Usat(ArmEmitterContext context)
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@ -659,6 +651,36 @@ namespace ARMeilleure.Instructions
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context.MarkLabel(lblEnd);
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}
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private static void EmitHadd8(ArmEmitterContext context, bool unsigned)
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{
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OpCode32AluReg op = (OpCode32AluReg)context.CurrOp;
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Operand m = GetIntA32(context, op.Rm);
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Operand n = GetIntA32(context, op.Rn);
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Operand xor, res, carry;
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// This relies on the equality x+y == ((x&y) << 1) + (x^y).
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// Note that x^y always contains the LSB of the result.
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// Since we want to calculate (x+y)/2, we can instead calculate (x&y) + ((x^y)>>1).
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// We mask by 0x7F to remove the LSB so that it doesn't leak into the field below.
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res = context.BitwiseAnd(m, n);
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carry = context.BitwiseExclusiveOr(m, n);
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xor = context.ShiftRightUI(carry, Const(1));
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xor = context.BitwiseAnd(xor, Const(0x7F7F7F7Fu));
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res = context.Add(res, xor);
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if (!unsigned)
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{
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// Propagates the sign bit from (x^y)>>1 upwards by one.
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carry = context.BitwiseAnd(carry, Const(0x80808080u));
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res = context.BitwiseExclusiveOr(res, carry);
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}
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SetIntA32(context, op.Rd, res);
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}
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private static void EmitSat(ArmEmitterContext context, int intMin, int intMax)
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{
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OpCode32Sat op = (OpCode32Sat)context.CurrOp;
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@ -516,6 +516,7 @@ namespace ARMeilleure.Instructions
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Rsb,
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Rsc,
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Sbfx,
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Shadd8,
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Smla__,
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Smlal,
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Smlal__,
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@ -77,6 +77,25 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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[Test, Pairwise]
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public void Shadd8([Values(0u, 0xdu)] uint rd,
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[Values(1u)] uint rm,
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[Values(2u)] uint rn,
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[Random(RndCnt)] uint w0,
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[Random(RndCnt)] uint w1,
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[Random(RndCnt)] uint w2)
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{
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uint opcode = 0xE6300F90u; // SHADD8 R0, R0, R0
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opcode |= ((rm & 15) << 0) | ((rd & 15) << 12) | ((rn & 15) << 16);
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uint sp = TestContext.CurrentContext.Random.NextUInt();
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SingleOpcode(opcode, r0: w0, r1: w1, r2: w2, sp: sp);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise]
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public void Ssat_Usat([ValueSource("_Ssat_Usat_")] uint opcode,
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[Values(0u, 0xdu)] uint rd,
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@ -120,7 +139,7 @@ namespace Ryujinx.Tests.Cpu
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[Random(RndCnt)] uint w1,
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[Random(RndCnt)] uint w2)
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{
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uint opcode = 0xE6700F90u; //UHADD8 R0, R0, R0
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uint opcode = 0xE6700F90u; // UHADD8 R0, R0, R0
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opcode |= ((rm & 15) << 0) | ((rd & 15) << 12) | ((rn & 15) << 16);
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