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Add Linux Unicorn patch + desc. (#2609)
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2 changed files with 45 additions and 2 deletions
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The pre-compiled dynamic libraries in this directory are licenced under the GPLv2.
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# Unicorn
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The source code for windows/unicorn.dll is available at: https://github.com/MerryMage/UnicornDotNet/tree/299451c02d9c810d2feca51f5e9cb6d8b2f38960
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Unicorn is a CPU simulator with bindings in many languages, including
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C#/.NET.
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It is used by the Ryujinx test suite for comparative testing with its built-in
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CPU simulator, Armeilleure.
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## Windows
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On Windows, Unicorn is shipped as a pre-compiled dynamic library (`.dll`), licenced under the GPLv2.
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The source code for `windows/unicorn.dll` is available at: https://github.com/MerryMage/UnicornDotNet/tree/299451c02d9c810d2feca51f5e9cb6d8b2f38960
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## Linux
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On Linux, you will first need to download Unicorn from https://github.com/unicorn-engine/unicorn.
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Then you need to patch it to expose the FSPCR register by applying `linux/unicorn_fspcr.patch`
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Then, compile Unicorn from source with its `make.sh` script.
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See https://github.com/Ryujinx/Ryujinx/pull/1433 for details.
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24
Ryujinx.Tests.Unicorn/libs/linux/unicorn_fspcr.patch
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24
Ryujinx.Tests.Unicorn/libs/linux/unicorn_fspcr.patch
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diff --git a/qemu/target-arm/unicorn_arm.c b/qemu/target-arm/unicorn_arm.c
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index 5ff9ebb..d4953f4 100644
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--- a/qemu/target-arm/unicorn_arm.c
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+++ b/qemu/target-arm/unicorn_arm.c
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@@ -101,6 +101,9 @@ int arm_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int coun
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case UC_ARM_REG_FPEXC:
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*(int32_t *)value = ARM_CPU(uc, mycpu)->env.vfp.xregs[ARM_VFP_FPEXC];
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break;
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+ case UC_ARM_REG_FPSCR:
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+ *(int32_t *)value = vfp_get_fpscr(&ARM_CPU(uc, mycpu)->env);
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+ break;
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case UC_ARM_REG_IPSR:
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*(uint32_t *)value = xpsr_read(&ARM_CPU(uc, mycpu)->env) & 0x1ff;
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break;
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@@ -175,6 +178,9 @@ int arm_reg_write(struct uc_struct *uc, unsigned int *regs, void* const* vals, i
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case UC_ARM_REG_FPEXC:
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ARM_CPU(uc, mycpu)->env.vfp.xregs[ARM_VFP_FPEXC] = *(int32_t *)value;
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break;
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+ case UC_ARM_REG_FPSCR:
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+ vfp_set_fpscr(&ARM_CPU(uc, mycpu)->env, *(uint32_t *)value);
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+ break;
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case UC_ARM_REG_IPSR:
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xpsr_write(&ARM_CPU(uc, mycpu)->env, *(uint32_t *)value, 0x1ff);
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break;
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