mirror of
https://github.com/ryujinx-mirror/ryujinx.git
synced 2024-12-25 15:25:44 +00:00
40b21cc3c4
* 3D engine now uses DeviceState too, plus new state modification tracking * Remove old methods code * Remove GpuState and friends * Optimize DeviceState, force inline some functions * This change was not supposed to go in * Proper channel initialization * Optimize state read/write methods even more * Fix debug build * Do not dirty state if the write is redundant * The YControl register should dirty either the viewport or front face state too, to update the host origin * Avoid redundant vertex buffer updates * Move state and get rid of the Ryujinx.Graphics.Gpu.State namespace * Comments and nits * Fix rebase * PR feedback * Move changed = false to improve codegen * PR feedback * Carry RyuJIT a bit more
400 lines
No EOL
13 KiB
C#
400 lines
No EOL
13 KiB
C#
using Ryujinx.Common.Logging;
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using Ryujinx.Graphics.Device;
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using System;
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using System.Collections.Generic;
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namespace Ryujinx.Graphics.Gpu.Engine.MME
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{
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/// <summary>
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/// Macro code interpreter.
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/// </summary>
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class MacroInterpreter : IMacroEE
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{
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/// <summary>
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/// Arguments FIFO.
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/// </summary>
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public Queue<int> Fifo { get; }
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private int[] _gprs;
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private int _methAddr;
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private int _methIncr;
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private bool _carry;
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private int _opCode;
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private int _pipeOp;
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private bool _ignoreExitFlag;
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private int _pc;
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/// <summary>
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/// Creates a new instance of the macro code interpreter.
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/// </summary>
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public MacroInterpreter()
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{
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Fifo = new Queue<int>();
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_gprs = new int[8];
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}
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/// <summary>
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/// Executes a macro program until it exits.
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/// </summary>
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/// <param name="code">Code of the program to execute</param>
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/// <param name="state">Current GPU state</param>
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/// <param name="arg0">Optional argument passed to the program, 0 if not used</param>
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public void Execute(ReadOnlySpan<int> code, IDeviceState state, int arg0)
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{
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Reset();
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_gprs[1] = arg0;
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_pc = 0;
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FetchOpCode(code);
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while (Step(code, state))
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{
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}
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// Due to the delay slot, we still need to execute
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// one more instruction before we actually exit.
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Step(code, state);
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}
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/// <summary>
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/// Resets the internal interpreter state.
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/// Call each time you run a new program.
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/// </summary>
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private void Reset()
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{
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for (int index = 0; index < _gprs.Length; index++)
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{
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_gprs[index] = 0;
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}
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_methAddr = 0;
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_methIncr = 0;
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_carry = false;
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}
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/// <summary>
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/// Executes a single instruction of the program.
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/// </summary>
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/// <param name="code">Program code to execute</param>
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/// <param name="state">Current GPU state</param>
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/// <returns>True to continue execution, false if the program exited</returns>
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private bool Step(ReadOnlySpan<int> code, IDeviceState state)
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{
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int baseAddr = _pc - 1;
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FetchOpCode(code);
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if ((_opCode & 7) < 7)
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{
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// Operation produces a value.
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AssignmentOperation asgOp = (AssignmentOperation)((_opCode >> 4) & 7);
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int result = GetAluResult(state);
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switch (asgOp)
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{
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// Fetch parameter and ignore result.
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case AssignmentOperation.IgnoreAndFetch:
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SetDstGpr(FetchParam());
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break;
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// Move result.
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case AssignmentOperation.Move:
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SetDstGpr(result);
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break;
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// Move result and use as Method Address.
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case AssignmentOperation.MoveAndSetMaddr:
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SetDstGpr(result);
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SetMethAddr(result);
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break;
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// Fetch parameter and send result.
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case AssignmentOperation.FetchAndSend:
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SetDstGpr(FetchParam());
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Send(state, result);
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break;
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// Move and send result.
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case AssignmentOperation.MoveAndSend:
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SetDstGpr(result);
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Send(state, result);
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break;
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// Fetch parameter and use result as Method Address.
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case AssignmentOperation.FetchAndSetMaddr:
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SetDstGpr(FetchParam());
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SetMethAddr(result);
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break;
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// Move result and use as Method Address, then fetch and send parameter.
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case AssignmentOperation.MoveAndSetMaddrThenFetchAndSend:
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SetDstGpr(result);
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SetMethAddr(result);
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Send(state, FetchParam());
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break;
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// Move result and use as Method Address, then send bits 17:12 of result.
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case AssignmentOperation.MoveAndSetMaddrThenSendHigh:
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SetDstGpr(result);
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SetMethAddr(result);
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Send(state, (result >> 12) & 0x3f);
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break;
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}
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}
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else
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{
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// Branch.
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bool onNotZero = ((_opCode >> 4) & 1) != 0;
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bool taken = onNotZero
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? GetGprA() != 0
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: GetGprA() == 0;
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if (taken)
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{
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_pc = baseAddr + GetImm();
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bool noDelays = (_opCode & 0x20) != 0;
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if (noDelays)
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{
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FetchOpCode(code);
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}
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else
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{
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// The delay slot instruction exit flag should be ignored.
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_ignoreExitFlag = true;
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}
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return true;
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}
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}
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bool exit = (_opCode & 0x80) != 0 && !_ignoreExitFlag;
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_ignoreExitFlag = false;
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return !exit;
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}
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/// <summary>
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/// Fetches a single operation code from the program code.
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/// </summary>
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/// <param name="code">Program code</param>
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private void FetchOpCode(ReadOnlySpan<int> code)
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{
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_opCode = _pipeOp;
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_pipeOp = code[_pc++];
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}
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/// <summary>
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/// Gets the result of the current Arithmetic and Logic unit operation.
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/// </summary>
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/// <param name="state">Current GPU state</param>
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/// <returns>Operation result</returns>
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private int GetAluResult(IDeviceState state)
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{
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AluOperation op = (AluOperation)(_opCode & 7);
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switch (op)
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{
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case AluOperation.AluReg:
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return GetAluResult((AluRegOperation)((_opCode >> 17) & 0x1f), GetGprA(), GetGprB());
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case AluOperation.AddImmediate:
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return GetGprA() + GetImm();
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case AluOperation.BitfieldReplace:
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case AluOperation.BitfieldExtractLslImm:
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case AluOperation.BitfieldExtractLslReg:
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int bfSrcBit = (_opCode >> 17) & 0x1f;
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int bfSize = (_opCode >> 22) & 0x1f;
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int bfDstBit = (_opCode >> 27) & 0x1f;
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int bfMask = (1 << bfSize) - 1;
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int dst = GetGprA();
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int src = GetGprB();
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switch (op)
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{
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case AluOperation.BitfieldReplace:
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src = (int)((uint)src >> bfSrcBit) & bfMask;
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dst &= ~(bfMask << bfDstBit);
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dst |= src << bfDstBit;
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return dst;
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case AluOperation.BitfieldExtractLslImm:
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src = (int)((uint)src >> dst) & bfMask;
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return src << bfDstBit;
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case AluOperation.BitfieldExtractLslReg:
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src = (int)((uint)src >> bfSrcBit) & bfMask;
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return src << dst;
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}
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break;
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case AluOperation.ReadImmediate:
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return Read(state, GetGprA() + GetImm());
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}
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throw new InvalidOperationException($"Invalid operation \"{op}\" on instruction 0x{_opCode:X8}.");
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}
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/// <summary>
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/// Gets the result of an Arithmetic and Logic operation using registers.
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/// </summary>
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/// <param name="aluOp">Arithmetic and Logic unit operation with registers</param>
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/// <param name="a">First operand value</param>
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/// <param name="b">Second operand value</param>
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/// <returns>Operation result</returns>
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private int GetAluResult(AluRegOperation aluOp, int a, int b)
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{
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ulong result;
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switch (aluOp)
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{
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case AluRegOperation.Add:
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result = (ulong)a + (ulong)b;
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_carry = result > 0xffffffff;
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return (int)result;
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case AluRegOperation.AddWithCarry:
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result = (ulong)a + (ulong)b + (_carry ? 1UL : 0UL);
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_carry = result > 0xffffffff;
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return (int)result;
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case AluRegOperation.Subtract:
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result = (ulong)a - (ulong)b;
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_carry = result < 0x100000000;
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return (int)result;
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case AluRegOperation.SubtractWithBorrow:
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result = (ulong)a - (ulong)b - (_carry ? 0UL : 1UL);
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_carry = result < 0x100000000;
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return (int)result;
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case AluRegOperation.BitwiseExclusiveOr: return a ^ b;
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case AluRegOperation.BitwiseOr: return a | b;
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case AluRegOperation.BitwiseAnd: return a & b;
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case AluRegOperation.BitwiseAndNot: return a & ~b;
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case AluRegOperation.BitwiseNotAnd: return ~(a & b);
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}
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throw new InvalidOperationException($"Invalid operation \"{aluOp}\" on instruction 0x{_opCode:X8}.");
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}
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/// <summary>
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/// Extracts a 32-bits signed integer constant from the current operation code.
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/// </summary>
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/// <returns>The 32-bits immediate value encoded at the current operation code</returns>
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private int GetImm()
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{
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// Note: The immediate is signed, the sign-extension is intended here.
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return _opCode >> 14;
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}
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/// <summary>
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/// Sets the current method address, for method calls.
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/// </summary>
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/// <param name="value">Packed address and increment value</param>
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private void SetMethAddr(int value)
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{
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_methAddr = (value >> 0) & 0xfff;
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_methIncr = (value >> 12) & 0x3f;
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}
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/// <summary>
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/// Sets the destination register value.
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/// </summary>
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/// <param name="value">Value to set (usually the operation result)</param>
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private void SetDstGpr(int value)
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{
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_gprs[(_opCode >> 8) & 7] = value;
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}
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/// <summary>
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/// Gets first operand value from the respective register.
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/// </summary>
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/// <returns>Operand value</returns>
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private int GetGprA()
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{
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return GetGprValue((_opCode >> 11) & 7);
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}
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/// <summary>
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/// Gets second operand value from the respective register.
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/// </summary>
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/// <returns>Operand value</returns>
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private int GetGprB()
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{
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return GetGprValue((_opCode >> 14) & 7);
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}
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/// <summary>
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/// Gets the value from a register, or 0 if the R0 register is specified.
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/// </summary>
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/// <param name="index">Index of the register</param>
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/// <returns>Register value</returns>
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private int GetGprValue(int index)
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{
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return index != 0 ? _gprs[index] : 0;
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}
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/// <summary>
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/// Fetches a call argument from the call argument FIFO.
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/// </summary>
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/// <returns>The call argument, or 0 if the FIFO is empty</returns>
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private int FetchParam()
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{
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if (!Fifo.TryDequeue(out int value))
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{
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Logger.Warning?.Print(LogClass.Gpu, "Macro attempted to fetch an inexistent argument.");
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return 0;
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}
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return value;
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}
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/// <summary>
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/// Reads data from a GPU register.
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/// </summary>
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/// <param name="state">Current GPU state</param>
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/// <param name="reg">Register offset to read</param>
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/// <returns>GPU register value</returns>
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private int Read(IDeviceState state, int reg)
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{
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return state.Read(reg * 4);
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}
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/// <summary>
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/// Performs a GPU method call.
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/// </summary>
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/// <param name="state">Current GPU state</param>
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/// <param name="value">Call argument</param>
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private void Send(IDeviceState state, int value)
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{
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state.Write(_methAddr * 4, value);
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_methAddr += _methIncr;
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}
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}
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} |