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295fbd0542
* ARMeilleure: Add AVX512{F,VL,DQ,BW} detection Add `UseAvx512Ortho` and `UseAvx512OrthoFloat` optimization flags as short-hands for `F+VL` and `F+VL+DQ`. * ARMeilleure: Add initial support for EVEX instruction encoding Does not implement rounding, or exception controls. * ARMeilleure: Add `X86Vpternlogd` Accelerates the vector-`Not` instruction. * ARMeilleure: Add check for `OSXSAVE` for AVX{2,512} * ARMeilleure: Add check for `XCR0` flags Add XCR0 register checks for AVX and AVX512F, following the guidelines from section 14.3 and 15.2 from the Intel Architecture Software Developer's Manual. * ARMeilleure: Increment InternalVersion * ARMeilleure: Remove redundant `ReProtect` and `Dispose`, formatting * ARMeilleure: Move XCR0 procedure to GetXcr0Eax * ARMeilleure: Add `XCR0` to `FeatureInfo` structure * ARMeilleure: Utilize `ReadOnlySpan` for Xcr0 assembly Avoids an additional allocation * ARMeilleure: Formatting fixes |
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.. | ||
BasicBlock.cs | ||
BasicBlockFrequency.cs | ||
Comparison.cs | ||
IIntrusiveListNode.cs | ||
Instruction.cs | ||
Intrinsic.cs | ||
IntrusiveList.cs | ||
MemoryOperand.cs | ||
Multiplier.cs | ||
Operand.cs | ||
OperandKind.cs | ||
OperandType.cs | ||
Operation.cs | ||
PhiOperation.cs | ||
Register.cs | ||
RegisterType.cs |