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1e7ea76f14
* Update SoftFloat.cs * Update SoftFallback.cs * Update InstEmitSimdShift.cs * Update InstEmitSimdCvt.cs * Update InstEmitSimdArithmetic.cs * Update CryptoHelper.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Update CpuThreadState.cs * Update OpCodeTable.cs * Add files via upload * Nit. * Remove unused using. Nit. * Remove unused using. FZ update. * Nit. * Remove unused using.
147 lines
5.9 KiB
C#
147 lines
5.9 KiB
C#
// https://www.intel.com/content/dam/doc/white-paper/advanced-encryption-standard-new-instructions-set-paper.pdf
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using ChocolArm64.State;
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using NUnit.Framework;
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using System.Runtime.Intrinsics;
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namespace Ryujinx.Tests.Cpu
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{
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public class CpuTestSimdCrypto : CpuTest
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{
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[Test, Description("AESD <Vd>.16B, <Vn>.16B")]
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public void Aesd_V([Values(0u)] uint rd,
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[Values(1u)] uint rn,
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[Values(0x7B5B546573745665ul)] ulong valueH,
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[Values(0x63746F725D53475Dul)] ulong valueL,
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[Random(2)] ulong roundKeyH,
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[Random(2)] ulong roundKeyL,
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[Values(0x8DCAB9BC035006BCul)] ulong resultH,
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[Values(0x8F57161E00CAFD8Dul)] ulong resultL)
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{
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uint opcode = 0x4E285800; // AESD V0.16B, V0.16B
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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Vector128<float> v0 = MakeVectorE0E1(roundKeyL ^ valueL, roundKeyH ^ valueH);
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Vector128<float> v1 = MakeVectorE0E1(roundKeyL, roundKeyH);
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CpuThreadState threadState = SingleOpcode(opcode, v0: v0, v1: v1);
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Assert.Multiple(() =>
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{
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Assert.That(GetVectorE0(threadState.V0), Is.EqualTo(resultL));
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Assert.That(GetVectorE1(threadState.V0), Is.EqualTo(resultH));
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});
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Assert.Multiple(() =>
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{
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Assert.That(GetVectorE0(threadState.V1), Is.EqualTo(roundKeyL));
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Assert.That(GetVectorE1(threadState.V1), Is.EqualTo(roundKeyH));
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});
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CompareAgainstUnicorn();
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}
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[Test, Description("AESE <Vd>.16B, <Vn>.16B")]
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public void Aese_V([Values(0u)] uint rd,
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[Values(1u)] uint rn,
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[Values(0x7B5B546573745665ul)] ulong valueH,
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[Values(0x63746F725D53475Dul)] ulong valueL,
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[Random(2)] ulong roundKeyH,
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[Random(2)] ulong roundKeyL,
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[Values(0x8F92A04DFBED204Dul)] ulong resultH,
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[Values(0x4C39B1402192A84Cul)] ulong resultL)
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{
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uint opcode = 0x4E284800; // AESE V0.16B, V0.16B
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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Vector128<float> v0 = MakeVectorE0E1(roundKeyL ^ valueL, roundKeyH ^ valueH);
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Vector128<float> v1 = MakeVectorE0E1(roundKeyL, roundKeyH);
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CpuThreadState threadState = SingleOpcode(opcode, v0: v0, v1: v1);
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Assert.Multiple(() =>
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{
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Assert.That(GetVectorE0(threadState.V0), Is.EqualTo(resultL));
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Assert.That(GetVectorE1(threadState.V0), Is.EqualTo(resultH));
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});
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Assert.Multiple(() =>
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{
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Assert.That(GetVectorE0(threadState.V1), Is.EqualTo(roundKeyL));
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Assert.That(GetVectorE1(threadState.V1), Is.EqualTo(roundKeyH));
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});
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CompareAgainstUnicorn();
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}
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[Test, Description("AESIMC <Vd>.16B, <Vn>.16B")]
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public void Aesimc_V([Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[Values(0x8DCAB9DC035006BCul)] ulong valueH,
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[Values(0x8F57161E00CAFD8Dul)] ulong valueL,
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[Values(0xD635A667928B5EAEul)] ulong resultH,
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[Values(0xEEC9CC3BC55F5777ul)] ulong resultL)
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{
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uint opcode = 0x4E287800; // AESIMC V0.16B, V0.16B
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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Vector128<float> v = MakeVectorE0E1(valueL, valueH);
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CpuThreadState threadState = SingleOpcode(
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opcode,
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v0: rn == 0u ? v : default(Vector128<float>),
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v1: rn == 1u ? v : default(Vector128<float>));
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Assert.Multiple(() =>
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{
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Assert.That(GetVectorE0(threadState.V0), Is.EqualTo(resultL));
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Assert.That(GetVectorE1(threadState.V0), Is.EqualTo(resultH));
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});
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if (rn == 1u)
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{
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Assert.Multiple(() =>
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{
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Assert.That(GetVectorE0(threadState.V1), Is.EqualTo(valueL));
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Assert.That(GetVectorE1(threadState.V1), Is.EqualTo(valueH));
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});
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}
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CompareAgainstUnicorn();
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}
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[Test, Description("AESMC <Vd>.16B, <Vn>.16B")]
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public void Aesmc_V([Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[Values(0x627A6F6644B109C8ul)] ulong valueH,
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[Values(0x2B18330A81C3B3E5ul)] ulong valueL,
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[Values(0x7B5B546573745665ul)] ulong resultH,
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[Values(0x63746F725D53475Dul)] ulong resultL)
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{
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uint opcode = 0x4E286800; // AESMC V0.16B, V0.16B
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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Vector128<float> v = MakeVectorE0E1(valueL, valueH);
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CpuThreadState threadState = SingleOpcode(
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opcode,
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v0: rn == 0u ? v : default(Vector128<float>),
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v1: rn == 1u ? v : default(Vector128<float>));
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Assert.Multiple(() =>
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{
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Assert.That(GetVectorE0(threadState.V0), Is.EqualTo(resultL));
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Assert.That(GetVectorE1(threadState.V0), Is.EqualTo(resultH));
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});
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if (rn == 1u)
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{
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Assert.Multiple(() =>
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{
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Assert.That(GetVectorE0(threadState.V1), Is.EqualTo(valueL));
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Assert.That(GetVectorE1(threadState.V1), Is.EqualTo(valueH));
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});
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}
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CompareAgainstUnicorn();
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}
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}
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}
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