mirror of
https://github.com/ryujinx-mirror/ryujinx.git
synced 2024-10-20 12:41:40 +00:00
9426ef3f06
* Start rewriting nvservices internals TODO: - nvgpu device interface - nvhost generic device interface * Some clean up and fixes - Make sure to remove the fd of a closed channel. - NvFileDevice now doesn't implement Disposable as it was never used. - Rename NvHostCtrlGetConfigurationArgument to GetConfigurationArguments to follow calling convention. - Make sure to check every ioctls magic. * Finalize migration for ioctl standard variant TODO: ioctl2 migration * Implement SubmitGpfifoEx and fix nvdec * Implement Ioctl3 * Implement some ioctl3 required by recent games * Remove unused code and outdated comments * Return valid event handles with QueryEvent Also add an exception for unimplemented event ids. This commit doesn't implement accurately the events, this only define different events for different event ids. * Rename all occurance of FileDevice to DeviceFile * Restub SetClientPid to not cause regressions * Address comments * Remove GlobalStateTable * Address comments * Align variables in ioctl3 * Some missing alignments * GetVaRegionsArguments realign * Make Owner public in NvDeviceFile * Address LDj3SNuD's comments
57 lines
1.7 KiB
C#
57 lines
1.7 KiB
C#
using System.Runtime.InteropServices;
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namespace Ryujinx.HLE.HOS.Services.Nv.NvDrvServices.NvHostCtrlGpu.Types
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{
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[StructLayout(LayoutKind.Sequential)]
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struct GpuCharacteristics
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{
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public int Arch;
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public int Impl;
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public int Rev;
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public int NumGpc;
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public long L2CacheSize;
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public long OnBoardVideoMemorySize;
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public int NumTpcPerGpc;
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public int BusType;
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public int BigPageSize;
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public int CompressionPageSize;
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public int PdeCoverageBitCount;
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public int AvailableBigPageSizes;
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public int GpcMask;
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public int SmArchSmVersion;
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public int SmArchSpaVersion;
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public int SmArchWarpCount;
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public int GpuVaBitCount;
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public int Reserved;
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public long Flags;
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public int TwodClass;
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public int ThreedClass;
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public int ComputeClass;
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public int GpfifoClass;
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public int InlineToMemoryClass;
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public int DmaCopyClass;
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public int MaxFbpsCount;
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public int FbpEnMask;
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public int MaxLtcPerFbp;
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public int MaxLtsPerLtc;
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public int MaxTexPerTpc;
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public int MaxGpcCount;
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public int RopL2EnMask0;
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public int RopL2EnMask1;
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public long ChipName;
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public long GrCompbitStoreBaseHw;
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}
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struct CharacteristicsHeader
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{
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public long BufferSize;
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public long BufferAddress;
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}
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[StructLayout(LayoutKind.Sequential)]
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struct GetCharacteristicsArguments
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{
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public CharacteristicsHeader Header;
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public GpuCharacteristics Characteristics;
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}
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}
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