mirror of
https://github.com/ryujinx-mirror/ryujinx.git
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22b2cb39af
* Turn `MemoryOperand` into a struct * Remove `IntrinsicOperation` * Remove `PhiNode` * Remove `Node` * Turn `Operand` into a struct * Turn `Operation` into a struct * Clean up pool management methods * Add `Arena` allocator * Move `OperationHelper` to `Operation.Factory` * Move `OperandHelper` to `Operand.Factory` * Optimize `Operation` a bit * Fix `Arena` initialization * Rename `NativeList<T>` to `ArenaList<T>` * Reduce `Operand` size from 88 to 56 bytes * Reduce `Operation` size from 56 to 40 bytes * Add optimistic interning of Register & Constant operands * Optimize `RegisterUsage` pass a bit * Optimize `RemoveUnusedNodes` pass a bit Iterating in reverse-order allows killing dependency chains in a single pass. * Fix PPTC symbols * Optimize `BasicBlock` a bit Reduce allocations from `_successor` & `DominanceFrontiers` * Fix `Operation` resize * Make `Arena` expandable Change the arena allocator to be expandable by allocating in pages, with some of them being pooled. Currently 32 pages are pooled. An LRU removal mechanism should probably be added to it. Apparently MHR can allocate bitmaps large enough to exceed the 16MB limit for the type. * Move `Arena` & `ArenaList` to `Common` * Remove `ThreadStaticPool` & co * Add `PhiOperation` * Reduce `Operand` size from 56 from 48 bytes * Add linear-probing to `Operand` intern table * Optimize `HybridAllocator` a bit * Add `Allocators` class * Tune `ArenaAllocator` sizes * Add page removal mechanism to `ArenaAllocator` Remove pages which have not been used for more than 5s after each reset. I am on fence if this would be better using a Gen2 callback object like the one in System.Buffers.ArrayPool<T>, to trim the pool. Because right now if a large translation happens, the pages will be freed only after a reset. This reset may not happen for a while because no new translation is hit, but the arena base sizes are rather small. * Fix `OOM` when allocating larger than page size in `ArenaAllocator` Tweak resizing mechanism for Operand.Uses and Assignemnts. * Optimize `Optimizer` a bit * Optimize `Operand.Add<T>/Remove<T>` a bit * Clean up `PreAllocator` * Fix phi insertion order Reduce codegen diffs. * Fix code alignment * Use new heuristics for degree of parallelism * Suppress warnings * Address gdkchan's feedback Renamed `GetValue()` to `GetValueUnsafe()` to make it more clear that `Operand.Value` should usually not be modified directly. * Add fast path to `ArenaAllocator` * Assembly for `ArenaAllocator.Allocate(ulong)`: .L0: mov rax, [rcx+0x18] lea r8, [rax+rdx] cmp r8, [rcx+0x10] ja short .L2 .L1: mov rdx, [rcx+8] add rax, [rdx+8] mov [rcx+0x18], r8 ret .L2: jmp ArenaAllocator.AllocateSlow(UInt64) A few variable/field had to be changed to ulong so that RyuJIT avoids emitting zero-extends. * Implement a new heuristic to free pooled pages. If an arena is used often, it is more likely that its pages will be needed, so the pages are kept for longer (e.g: during PPTC rebuild or burst sof compilations). If is not used often, then it is more likely that its pages will not be needed (e.g: after PPTC rebuild or bursts of compilations). * Address riperiperi's feedback * Use `EqualityComparer<T>` in `IntrusiveList<T>` Avoids a potential GC hole in `Equals(T, T)`.
235 lines
7.6 KiB
C#
235 lines
7.6 KiB
C#
using ARMeilleure.Decoders;
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using ARMeilleure.IntermediateRepresentation;
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using ARMeilleure.State;
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using ARMeilleure.Translation;
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using ARMeilleure.Translation.Cache;
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using ARMeilleure.Translation.PTC;
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using static ARMeilleure.Instructions.InstEmitHelper;
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using static ARMeilleure.IntermediateRepresentation.Operand.Factory;
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namespace ARMeilleure.Instructions
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{
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static class InstEmitFlowHelper
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{
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public static void EmitCondBranch(ArmEmitterContext context, Operand target, Condition cond)
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{
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if (cond != Condition.Al)
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{
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context.BranchIfTrue(target, GetCondTrue(context, cond));
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}
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else
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{
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context.Branch(target);
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}
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}
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public static Operand GetCondTrue(ArmEmitterContext context, Condition condition)
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{
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Operand cmpResult = context.TryGetComparisonResult(condition);
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if (cmpResult != default)
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{
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return cmpResult;
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}
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Operand value = Const(1);
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Operand Inverse(Operand val)
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{
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return context.BitwiseExclusiveOr(val, Const(1));
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}
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switch (condition)
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{
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case Condition.Eq:
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value = GetFlag(PState.ZFlag);
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break;
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case Condition.Ne:
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value = Inverse(GetFlag(PState.ZFlag));
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break;
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case Condition.GeUn:
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value = GetFlag(PState.CFlag);
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break;
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case Condition.LtUn:
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value = Inverse(GetFlag(PState.CFlag));
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break;
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case Condition.Mi:
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value = GetFlag(PState.NFlag);
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break;
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case Condition.Pl:
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value = Inverse(GetFlag(PState.NFlag));
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break;
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case Condition.Vs:
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value = GetFlag(PState.VFlag);
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break;
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case Condition.Vc:
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value = Inverse(GetFlag(PState.VFlag));
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break;
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case Condition.GtUn:
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{
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Operand c = GetFlag(PState.CFlag);
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Operand z = GetFlag(PState.ZFlag);
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value = context.BitwiseAnd(c, Inverse(z));
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break;
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}
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case Condition.LeUn:
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{
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Operand c = GetFlag(PState.CFlag);
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Operand z = GetFlag(PState.ZFlag);
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value = context.BitwiseOr(Inverse(c), z);
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break;
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}
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case Condition.Ge:
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{
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Operand n = GetFlag(PState.NFlag);
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Operand v = GetFlag(PState.VFlag);
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value = context.ICompareEqual(n, v);
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break;
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}
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case Condition.Lt:
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{
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Operand n = GetFlag(PState.NFlag);
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Operand v = GetFlag(PState.VFlag);
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value = context.ICompareNotEqual(n, v);
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break;
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}
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case Condition.Gt:
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{
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Operand n = GetFlag(PState.NFlag);
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Operand z = GetFlag(PState.ZFlag);
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Operand v = GetFlag(PState.VFlag);
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value = context.BitwiseAnd(Inverse(z), context.ICompareEqual(n, v));
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break;
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}
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case Condition.Le:
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{
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Operand n = GetFlag(PState.NFlag);
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Operand z = GetFlag(PState.ZFlag);
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Operand v = GetFlag(PState.VFlag);
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value = context.BitwiseOr(z, context.ICompareNotEqual(n, v));
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break;
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}
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}
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return value;
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}
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public static void EmitCall(ArmEmitterContext context, ulong immediate)
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{
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bool isRecursive = immediate == context.EntryAddress;
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if (isRecursive)
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{
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context.Branch(context.GetLabel(immediate));
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}
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else
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{
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EmitTableBranch(context, Const(immediate), isJump: false);
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}
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}
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public static void EmitVirtualCall(ArmEmitterContext context, Operand target)
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{
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EmitTableBranch(context, target, isJump: false);
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}
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public static void EmitVirtualJump(ArmEmitterContext context, Operand target, bool isReturn)
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{
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if (isReturn)
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{
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context.Return(target);
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}
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else
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{
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EmitTableBranch(context, target, isJump: true);
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}
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}
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private static void EmitTableBranch(ArmEmitterContext context, Operand guestAddress, bool isJump)
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{
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context.StoreToContext();
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if (guestAddress.Type == OperandType.I32)
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{
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guestAddress = context.ZeroExtend32(OperandType.I64, guestAddress);
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}
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// Store the target guest address into the native context. The stubs uses this address to dispatch into the
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// next translation.
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Operand nativeContext = context.LoadArgument(OperandType.I64, 0);
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Operand dispAddressAddr = context.Add(nativeContext, Const((ulong)NativeContext.GetDispatchAddressOffset()));
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context.Store(dispAddressAddr, guestAddress);
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Operand hostAddress;
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// If address is mapped onto the function table, we can skip the table walk. Otherwise we fallback
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// onto the dispatch stub.
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if (guestAddress.Kind == OperandKind.Constant && context.FunctionTable.IsValid(guestAddress.Value))
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{
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Operand hostAddressAddr = !context.HasPtc ?
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Const(ref context.FunctionTable.GetValue(guestAddress.Value)) :
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Const(ref context.FunctionTable.GetValue(guestAddress.Value), new Symbol(SymbolType.FunctionTable, guestAddress.Value));
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hostAddress = context.Load(OperandType.I64, hostAddressAddr);
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}
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else
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{
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hostAddress = !context.HasPtc ?
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Const((long)context.Stubs.DispatchStub) :
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Const((long)context.Stubs.DispatchStub, Ptc.DispatchStubSymbol);
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}
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if (isJump)
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{
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context.Tailcall(hostAddress, nativeContext);
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}
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else
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{
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OpCode op = context.CurrOp;
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Operand returnAddress = context.Call(hostAddress, OperandType.I64, nativeContext);
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context.LoadFromContext();
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// Note: The return value of a translated function is always an Int64 with the address execution has
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// returned to. We expect this address to be immediately after the current instruction, if it isn't we
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// keep returning until we reach the dispatcher.
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Operand nextAddr = Const((long)op.Address + op.OpCodeSizeInBytes);
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// Try to continue within this block.
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// If the return address isn't to our next instruction, we need to return so the JIT can figure out
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// what to do.
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Operand lblContinue = context.GetLabel(nextAddr.Value);
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context.BranchIf(lblContinue, returnAddress, nextAddr, Comparison.Equal, BasicBlockFrequency.Cold);
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context.Return(returnAddress);
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}
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}
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}
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}
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