emu-mirrors/Ryujinx
0
0
Fork 0
mirror of https://github.com/GreemDev/Ryujinx.git synced 2024-12-23 11:35:47 +00:00
Code Wiki Activity

InstEmitMemoryEx: Barrier after write on ordered store (#3193)

Browse source 
* InstEmitMemoryEx: Barrier after write on ordered store

* increment ptc version

* 32
This commit is contained in:
merry 2022-03-19 13:32:35 +00:00 committed by GitHub
parent e2ffa5a125
commit df70442c46
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
3 changed files with 16 additions and 11 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

10
ARMeilleure/Instructions/InstEmitMemoryEx.cs
View file

@ -130,11 +130,6 @@ namespace ARMeilleure.Instructions
bool ordered = (accType & AccessType.Ordered) != 0; bool ordered = (accType & AccessType.Ordered) != 0;
bool exclusive = (accType & AccessType.Exclusive) != 0; bool exclusive = (accType & AccessType.Exclusive) != 0;
if (ordered)
{
EmitBarrier(context);
}
Operand address = context.Copy(GetIntOrSP(context, op.Rn)); Operand address = context.Copy(GetIntOrSP(context, op.Rn));
Operand t = GetIntOrZR(context, op.Rt); Operand t = GetIntOrZR(context, op.Rt);
@ -163,6 +158,11 @@ namespace ARMeilleure.Instructions
{ {
EmitStoreExclusive(context, address, t, exclusive, op.Size, op.Rs, a32: false); EmitStoreExclusive(context, address, t, exclusive, op.Size, op.Rs, a32: false);
} }
if (ordered)
{
EmitBarrier(context);
}
} }
private static void EmitBarrier(ArmEmitterContext context) private static void EmitBarrier(ArmEmitterContext context)

9
ARMeilleure/Instructions/InstEmitMemoryEx32.cs
View file

@ -146,13 +146,13 @@ namespace ARMeilleure.Instructions
var exclusive = (accType & AccessType.Exclusive) != 0; var exclusive = (accType & AccessType.Exclusive) != 0;
var ordered = (accType & AccessType.Ordered) != 0; var ordered = (accType & AccessType.Ordered) != 0;
if ((accType & AccessType.Load) != 0)
{
if (ordered) if (ordered)
{ {
EmitBarrier(context); EmitBarrier(context);
} }
if ((accType & AccessType.Load) != 0)
{
if (size == DWordSizeLog2) if (size == DWordSizeLog2)
{ {
// Keep loads atomic - make the call to get the whole region and then decompose it into parts // Keep loads atomic - make the call to get the whole region and then decompose it into parts
@ -219,6 +219,11 @@ namespace ARMeilleure.Instructions
Operand value = context.ZeroExtend32(OperandType.I64, GetIntA32(context, op.Rt)); Operand value = context.ZeroExtend32(OperandType.I64, GetIntA32(context, op.Rt));
EmitStoreExclusive(context, address, value, exclusive, size, op.Rd, a32: true); EmitStoreExclusive(context, address, value, exclusive, size, op.Rd, a32: true);
} }
if (ordered)
{
EmitBarrier(context);
}
} }
} }

2
ARMeilleure/Translation/PTC/Ptc.cs
View file

@ -27,7 +27,7 @@ namespace ARMeilleure.Translation.PTC
private const string OuterHeaderMagicString = "PTCohd\0\0"; private const string OuterHeaderMagicString = "PTCohd\0\0";
private const string InnerHeaderMagicString = "PTCihd\0\0"; private const string InnerHeaderMagicString = "PTCihd\0\0";
private const uint InternalVersion = 3179; //! To be incremented manually for each change to the ARMeilleure project. private const uint InternalVersion = 3193; //! To be incremented manually for each change to the ARMeilleure project.
private const string ActualDir = "0"; private const string ActualDir = "0";
private const string BackupDir = "1"; private const string BackupDir = "1";