mirror of
https://github.com/GreemDev/Ryujinx.git
synced 2024-12-23 18:35:47 +00:00
f09bba82b9
* Implement vertex and geometry shader conversion to compute * Call InitializeReservedCounts for compute too * PR feedback * Set clip distance mask for geometry and tessellation shaders too * Transform feedback emulation only for vertex
373 lines
14 KiB
C#
373 lines
14 KiB
C#
using Ryujinx.Graphics.Shader.Decoders;
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using Ryujinx.Graphics.Shader.IntermediateRepresentation;
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using System;
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using System.Linq;
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using static Ryujinx.Graphics.Shader.IntermediateRepresentation.OperandHelper;
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namespace Ryujinx.Graphics.Shader.Translation
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{
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public static class Translator
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{
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private const int ThreadsPerWarp = 32;
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private const int HeaderSize = 0x50;
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internal readonly struct FunctionCode
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{
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public Operation[] Code { get; }
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public FunctionCode(Operation[] code)
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{
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Code = code;
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}
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}
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public static TranslatorContext CreateContext(ulong address, IGpuAccessor gpuAccessor, TranslationOptions options)
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{
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return DecodeShader(address, gpuAccessor, options);
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}
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private static TranslatorContext DecodeShader(ulong address, IGpuAccessor gpuAccessor, TranslationOptions options)
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{
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int localMemorySize;
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ShaderDefinitions definitions;
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DecodedProgram program;
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if (options.Flags.HasFlag(TranslationFlags.Compute))
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{
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definitions = CreateComputeDefinitions(gpuAccessor);
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localMemorySize = gpuAccessor.QueryComputeLocalMemorySize();
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program = Decoder.Decode(definitions, gpuAccessor, address);
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}
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else
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{
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ShaderHeader header = new(gpuAccessor, address);
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definitions = CreateGraphicsDefinitions(gpuAccessor, header);
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localMemorySize = GetLocalMemorySize(header);
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program = Decoder.Decode(definitions, gpuAccessor, address + HeaderSize);
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}
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ulong maxEndAddress = 0;
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foreach (DecodedFunction function in program)
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{
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foreach (Block block in function.Blocks)
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{
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if (maxEndAddress < block.EndAddress)
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{
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maxEndAddress = block.EndAddress;
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}
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}
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}
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int size = (int)maxEndAddress + (options.Flags.HasFlag(TranslationFlags.Compute) ? 0 : HeaderSize);
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return new TranslatorContext(address, size, localMemorySize, definitions, gpuAccessor, options, program);
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}
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private static ShaderDefinitions CreateComputeDefinitions(IGpuAccessor gpuAccessor)
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{
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return new ShaderDefinitions(
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ShaderStage.Compute,
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gpuAccessor.QueryComputeLocalSizeX(),
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gpuAccessor.QueryComputeLocalSizeY(),
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gpuAccessor.QueryComputeLocalSizeZ());
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}
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private static ShaderDefinitions CreateGraphicsDefinitions(IGpuAccessor gpuAccessor, ShaderHeader header)
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{
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TransformFeedbackOutput[] transformFeedbackOutputs = GetTransformFeedbackOutputs(gpuAccessor, out ulong transformFeedbackVecMap);
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return new ShaderDefinitions(
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header.Stage,
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gpuAccessor.QueryGraphicsState(),
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header.Stage == ShaderStage.Geometry && header.GpPassthrough,
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header.ThreadsPerInputPrimitive,
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header.OutputTopology,
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header.MaxOutputVertexCount,
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header.ImapTypes,
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header.OmapTargets,
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header.OmapSampleMask,
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header.OmapDepth,
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gpuAccessor.QueryHostSupportsScaledVertexFormats(),
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transformFeedbackVecMap,
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transformFeedbackOutputs);
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}
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internal static TransformFeedbackOutput[] GetTransformFeedbackOutputs(IGpuAccessor gpuAccessor, out ulong transformFeedbackVecMap)
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{
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bool transformFeedbackEnabled =
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gpuAccessor.QueryTransformFeedbackEnabled() &&
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gpuAccessor.QueryHostSupportsTransformFeedback();
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TransformFeedbackOutput[] transformFeedbackOutputs = null;
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transformFeedbackVecMap = 0UL;
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if (transformFeedbackEnabled)
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{
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transformFeedbackOutputs = new TransformFeedbackOutput[0xc0];
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for (int tfbIndex = 0; tfbIndex < 4; tfbIndex++)
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{
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var locations = gpuAccessor.QueryTransformFeedbackVaryingLocations(tfbIndex);
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var stride = gpuAccessor.QueryTransformFeedbackStride(tfbIndex);
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for (int i = 0; i < locations.Length; i++)
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{
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byte wordOffset = locations[i];
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if (wordOffset < 0xc0)
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{
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transformFeedbackOutputs[wordOffset] = new TransformFeedbackOutput(tfbIndex, i * 4, stride);
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transformFeedbackVecMap |= 1UL << (wordOffset / 4);
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}
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}
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}
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}
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return transformFeedbackOutputs;
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}
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private static int GetLocalMemorySize(ShaderHeader header)
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{
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return header.ShaderLocalMemoryLowSize + header.ShaderLocalMemoryHighSize + (header.ShaderLocalMemoryCrsSize / ThreadsPerWarp);
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}
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internal static FunctionCode[] EmitShader(
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TranslatorContext translatorContext,
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ResourceManager resourceManager,
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DecodedProgram program,
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bool vertexAsCompute,
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bool initializeOutputs,
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out int initializationOperations)
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{
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initializationOperations = 0;
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FunctionMatch.RunPass(program);
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foreach (DecodedFunction function in program.Where(x => !x.IsCompilerGenerated).OrderBy(x => x.Address))
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{
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program.AddFunctionAndSetId(function);
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}
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FunctionCode[] functions = new FunctionCode[program.FunctionsWithIdCount];
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for (int index = 0; index < functions.Length; index++)
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{
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EmitterContext context = new(translatorContext, resourceManager, program, vertexAsCompute, index != 0);
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if (initializeOutputs && index == 0)
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{
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EmitOutputsInitialization(context, translatorContext.AttributeUsage, translatorContext.GpuAccessor, translatorContext.Stage);
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initializationOperations = context.OperationsCount;
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}
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DecodedFunction function = program.GetFunctionById(index);
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foreach (Block block in function.Blocks)
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{
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context.CurrBlock = block;
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context.EnterBlock(block.Address);
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EmitOps(context, block);
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}
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functions[index] = new(context.GetOperations());
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}
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return functions;
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}
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private static void EmitOutputsInitialization(EmitterContext context, AttributeUsage attributeUsage, IGpuAccessor gpuAccessor, ShaderStage stage)
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{
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// Compute has no output attributes, and fragment is the last stage, so we
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// don't need to initialize outputs on those stages.
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if (stage == ShaderStage.Compute || stage == ShaderStage.Fragment)
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{
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return;
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}
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if (stage == ShaderStage.Vertex)
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{
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InitializePositionOutput(context);
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}
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UInt128 usedAttributes = context.TranslatorContext.AttributeUsage.NextInputAttributesComponents;
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while (usedAttributes != UInt128.Zero)
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{
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int index = (int)UInt128.TrailingZeroCount(usedAttributes);
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int vecIndex = index / 4;
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usedAttributes &= ~(UInt128.One << index);
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// We don't need to initialize passthrough attributes.
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if ((context.TranslatorContext.AttributeUsage.PassthroughAttributes & (1 << vecIndex)) != 0)
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{
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continue;
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}
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InitializeOutputComponent(context, vecIndex, index & 3, perPatch: false);
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}
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if (context.TranslatorContext.AttributeUsage.NextUsedInputAttributesPerPatch != null)
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{
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foreach (int vecIndex in context.TranslatorContext.AttributeUsage.NextUsedInputAttributesPerPatch.Order())
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{
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InitializeOutput(context, vecIndex, perPatch: true);
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}
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}
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if (attributeUsage.NextUsesFixedFuncAttributes)
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{
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bool supportsLayerFromVertexOrTess = gpuAccessor.QueryHostSupportsLayerVertexTessellation();
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int fixedStartAttr = supportsLayerFromVertexOrTess ? 0 : 1;
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for (int i = fixedStartAttr; i < fixedStartAttr + 5 + AttributeConsts.TexCoordCount; i++)
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{
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int index = attributeUsage.GetFreeUserAttribute(isOutput: true, i);
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if (index < 0)
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{
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break;
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}
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InitializeOutput(context, index, perPatch: false);
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}
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}
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}
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private static void InitializePositionOutput(EmitterContext context)
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{
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for (int c = 0; c < 4; c++)
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{
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context.Store(StorageKind.Output, IoVariable.Position, null, Const(c), ConstF(c == 3 ? 1f : 0f));
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}
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}
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private static void InitializeOutput(EmitterContext context, int location, bool perPatch)
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{
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for (int c = 0; c < 4; c++)
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{
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InitializeOutputComponent(context, location, c, perPatch);
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}
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}
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private static void InitializeOutputComponent(EmitterContext context, int location, int c, bool perPatch)
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{
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StorageKind storageKind = perPatch ? StorageKind.OutputPerPatch : StorageKind.Output;
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if (context.TranslatorContext.Definitions.OaIndexing)
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{
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Operand invocationId = null;
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if (context.TranslatorContext.Definitions.Stage == ShaderStage.TessellationControl && !perPatch)
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{
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invocationId = context.Load(StorageKind.Input, IoVariable.InvocationId);
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}
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int index = location * 4 + c;
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context.Store(storageKind, IoVariable.UserDefined, invocationId, Const(index), ConstF(c == 3 ? 1f : 0f));
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}
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else
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{
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if (context.TranslatorContext.Definitions.Stage == ShaderStage.TessellationControl && !perPatch)
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{
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Operand invocationId = context.Load(StorageKind.Input, IoVariable.InvocationId);
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context.Store(storageKind, IoVariable.UserDefined, Const(location), invocationId, Const(c), ConstF(c == 3 ? 1f : 0f));
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}
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else
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{
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context.Store(storageKind, IoVariable.UserDefined, null, Const(location), Const(c), ConstF(c == 3 ? 1f : 0f));
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}
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}
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}
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private static void EmitOps(EmitterContext context, Block block)
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{
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for (int opIndex = 0; opIndex < block.OpCodes.Count; opIndex++)
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{
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InstOp op = block.OpCodes[opIndex];
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if (context.TranslatorContext.Options.Flags.HasFlag(TranslationFlags.DebugMode))
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{
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string instName;
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if (op.Emitter != null)
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{
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instName = op.Name.ToString();
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}
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else
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{
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instName = "???";
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context.TranslatorContext.GpuAccessor.Log($"Invalid instruction at 0x{op.Address:X6} (0x{op.RawOpCode:X16}).");
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}
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string dbgComment = $"0x{op.Address:X6}: 0x{op.RawOpCode:X16} {instName}";
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context.Add(new CommentNode(dbgComment));
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}
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InstConditional opConditional = new(op.RawOpCode);
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bool noPred = op.Props.HasFlag(InstProps.NoPred);
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if (!noPred && opConditional.Pred == RegisterConsts.PredicateTrueIndex && opConditional.PredInv)
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{
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continue;
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}
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Operand predSkipLbl = null;
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if (Decoder.IsPopBranch(op.Name))
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{
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// If the instruction is a SYNC or BRK instruction with only one
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// possible target address, then the instruction is basically
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// just a simple branch, we can generate code similar to branch
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// instructions, with the condition check on the branch itself.
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noPred = block.SyncTargets.Count <= 1;
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}
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else if (op.Name == InstName.Bra)
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{
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noPred = true;
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}
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if (!(opConditional.Pred == RegisterConsts.PredicateTrueIndex || noPred))
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{
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Operand label;
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if (opIndex == block.OpCodes.Count - 1 && block.HasNext())
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{
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label = context.GetLabel(block.Successors[0].Address);
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}
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else
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{
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label = Label();
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predSkipLbl = label;
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}
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Operand pred = Register(opConditional.Pred, RegisterType.Predicate);
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if (opConditional.PredInv)
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{
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context.BranchIfTrue(label, pred);
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}
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else
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{
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context.BranchIfFalse(label, pred);
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}
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}
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context.CurrOp = op;
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op.Emitter?.Invoke(context);
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if (predSkipLbl != null)
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{
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context.MarkLabel(predSkipLbl);
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}
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}
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}
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}
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}
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